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Grafeen:  dé  kandidaat  voor  de  nieuwe  

generatie  (HF-­‐‑)elektronica

Dirk  W.  van  Baarle  MSc

,  prof.  dr.  J.W.M  Frenken  

Oppervlaktefysica    

s  

s  

D   G   G  

GRAPHENE APPLICATIONS IN ELECTRONICS AND PHOTONICS

1228 MRS BULLETIN • VOLUME 37 • DECEMBER 2012 www.mrs.org/bulletin to another substrate, such as any of the opti-cally transparent

substrates used in photonic applications. Once a graphene fi lm is in place, devices can be fabricated in it using electron-beam or photolithography , and oxygen plasma can be used to etch

away the unwante

d graphene. Metal contacts are formed using some form of metal evaporation. A key m

aterials issue enc

ountered in the fabrication of graphene devices involves fi nd-ing an appropriate gate dielectric insulator and substrate. To optimize

the fi eld effect o f the gate, a very thin high-dielectric-constant fi lm is needed. Graphene is both inert and hydro-phobic. Therefore , very th in polar insulato rs (e.g., SiO 2 , HfO 2 , Al 2 O 3 ) form p oor-quality, nonuniform, and leaky fi lms on it. In ad dition, such m aterials t end to trap charg es near or at the insu lator–gra phene in terface, leading to Coulom

b scattering and a drama

tic decrease in carrier

mobility . 33

A num

ber of different approaches hav

e been used to a ddress this problem , includin g deposition of a thin, inert buffer layer that wets the surface before atomic-layer deposi-tion (ALD) of the main fi lm, 33 plasma-assisted d eposition of Si 3 N 4 , 34 or depo sition of a thin m

etal fi lm seed lay

er (usually aluminum) that i s then oxidized i n situ prior to A LD of the insulator fi lm. 35 Because g raphene p roduced b y different method s is uninte n-tionally p - or n -doped, there is a n

eed to shift the ne

utrality point close to VG = 0 V. This can be accomplished through compen-sation by choosing the appropriate insulator , for example, AlO x for CVD graphene or SiN x for epitaxial graphene. A schematic of the structure and a colorized image of a fabricated RF GFET are shown in Figur e 3 a–b. 36 See the sidebar for a description of some metrics used to evaluate GFET

s. The fi rst experim

ental gra phene tra

nsistors used grap hene exfoliated from graphite and deposited on SiO 2 to initia lly make dc 38 , 39 and later RF 36 , 37 , 40 46 GFET d evices. The fi rst technologically relevant efforts utilizing wafer -scale synthe-sized gr aphene w ere base d on the therma l decom position of SiC. 40 44 A highly encoura ging resu lt came in 2010, w hen wafer -scale RF GFET s were produced with fT values of 100 GHz. 44 However, the la ck of a bandgap

, the high optica l-phonon frequen

cy in graphene,

and the presence

of defects made current saturation hard to achieve; gd was large,

and thus volt-age gain

was low. In these early stu

dies, ho wever, th e graphene used had a rather modest mobility of 1500 cm 2 V –1 s –1 , and the g ate length was, by today’ s silicon-industry standards, quite long (240 nm), suggesting that dramatic enhancements in performance could be achieved by additional materials and device improvements. Indeed, the second generation of SiC-based GFET s attained fT values e xceeding 300 GH z, in part by em ploying channel lengths as low as 40 nm 17 (see Figure 3c ), and voltage gains up

GFET Metrics

Several m

etrics are used to e

valuate GFETs. A ssessment of the intrinsic capabilities of a new channel material, such as graphene, should be insensitive to contact resis-tance and fabrication details. The metric used for this purpose is the cutof f frequency , fT , which is defi ned as the frequency at which the current gain becomes 1 when the drain is short-circuited to the source. In a well-behaved device, f T is given by fT = g m /2 π C , where g m ( g m = d I /d V G ) and C are the transconductance and gate capacitance of the device, respectively

. 3

In contra

st to this indicato r of ultim

ate potential, for working dev

ices, it is the vo ltage ga in that is usually demanded. This voltage gain is defi ned as the ratio of the outpu t voltage (at the d rain) to the input voltage (at the ga

te) and is given b

y the ratio of the transconductance, gm , to the o utput conductan ce, gd ( gd = d I /d Vd ). High voltage gain requires gm to be as high as possible and g d to be as small as possible. The latter condition requires

that the transistor

be operated at conditions of current saturation, where the current is almost independent of Vd . Many application

s also require pow

er gain, for which the appropriate metric is the maximum frequency , fmax , which is the frequency at which the unilateral power gain becomes unity . 3 This me

tric is strongly dep endent not only on the channel material (i.e., graphene), but also on the actual structure of the device.

Figure 3.

(a) Schematic and (b) colorized optical image of a top-gated GFET

, in which the voltage on the gate (G) contr

ols the curr

ent fl owing in the underlying graphene between the sour

ce (S) and drain (D). In both cases, the tan r

egion including the sour

ce and drain represents graphene. (c) Curr

ent gains of two radio-fr

equency (RF) GFET

s as functions of frequency

. One (blue squar

es) is a CVD graphene FET on a diamond-like carbon (DLC)

fi lm for w

hich the

current gain ext rapolate

s to unity at f

T = 155 GHz, 37

and the other (red squar

es) is an epitaxial graphene FET fr

om SiC with

f T = 300 GHz. 36

from leaking into the final IF output. The measured conversion gain as a function ofPLOis also shown in Supplementary Fig. 6. With drain biases of!1.5 V, the whole three-stage IC consumes less than 20 mW power, 600% lower than single-stage graphene IC in ref. 16. Figure 4b shows the measured receiver output tones (P1F,P2F,P3F) as a function of input RF power (PRF); low RF harmonic distortion (P1F–P2FB30 dB forPRF¼0 dBm) indicates good circuit linearity. The circuit is designed to band-pass filter the RF input signal before entering the mixer to improve the data quality by rejecting unwanted signals outside the carrier frequency band. The effective RF input filtering can be seen from the sharp frequency response in Fig. 4c (B1 GHz of 3-dB bandwidth). The receiver conversion gain is also measured as a function of the LO frequency (Fig. 4d).

To best demonstrate the true functionality of the graphene IC, an RF carrier of 4.3 GHz was amplitude modulated with a bit stream and sent into the receiver to mimic the typical digital data transmitted via wireless carrier. Measured single bit waveforms in Fig. 4e show undistorted IF output signal from the receiver

without the aid of any additional signal amplification, suggesting that a high-quality receiver function has been achieved. The original binary code can then be easily recovered by rectification and low-pass filtering. Figure 4f further shows that bit stream comprising ASCII code of ‘IBM’ modulated at 20 Mb s!1 is

successfully received and demodulated. The modulation rate is limited by the test equipment, and not by the receiver IC.

Discussion

The demonstration of multifunctional RF ICs built with the graphene-last flow in Si fab clearly paves the way for seamless heterogenous three-dimensional (3D) system integration, where graphene IC’s BEOL can be co-integrated with standard Si CMOS BEOL as illustrated in Fig. 1a. On the other hand, stacking conventional semiconductor layers such as Si or III-V into 3D system is rather complicated and costly, where challenges arise from high-temperature annealing processes (typically41,000!C) required for each active layer device formation that are not

P3F P2F P1F 0 –20 –40 –60 –50 –30 –10 –2 –1 0 1 2 –2 –1 0 1 2 2 3 4 5 6 2 On On On H 500 ns/ –261.3200 ns T –2.0 mV On 2 3 4 1 20.0 mV/ 3 4

Graphene RF Receiver output signal

01001001 I B M 01000010 01001101 5 6 0 –20 –30 –10 0 –20 –30 –10 Normalized power (dBm)

Normalized power (dBm) Normalized power (dBm)

Output power (dBm) 0 –20 –40 –60 –80 Frequency (GHz) fRF (GHz) fLO (GHz) fLO fRF fRF–fLO fIF (GHz) fIF (GHz) PRF= –20 dBm PLO= –2 dBm fRF= 4.3 GHz fLO= 4.2 GHz fLO= 4.2 GHz PRF= 0 dBm PLO= –2 dBm fRF= 4.3 GHz PRF= 0 dBm PLO= –2 dBm PLO= –2 dBm PRF (dBm) 0 10 –20 –40 –30 –10 0.0 2.0 4.0 6.0 8.0 10.0 RF Carrier (4.3 GHz) IF (100 MHz) Rectified/LPF 0 1 0 0 1 0

Figure 4 | Graphene IC measured as RF receiver.(a) Output spectrum of graphene receiver with 900 nm gate length. RF input signal was !20 dBm at 4.3 GHz and LO input signal was!2 dBm at 4.2 GHz. Down converted IF output signal at 100 MHz (fIF¼fRF!fLO) was!30 dBm. (b) Normalized

output power of the fundamental tone (P1F), the second harmonic (P2F) and the third harmonic (P3F) as a function of RF power (PRF), showing no gain

compression up to!10 dBmPRF. (c) Normalized output power as a function of LO frequency. (d) Normalized output power as a function of RF.

(e) Measured waveforms of RF input signal amplitude modulated at a rate of 20 Mb s!1, IF output signal and restored binary code after rectifying and low-pass filtering IF signal. (f) A screenshot of receiver output waveforms taken from the oscilloscope, with LO power of!2 dBm at 4.2 GHz. The original bit stream comprising three letters (24 bits) was recovered by graphene receiver with very low distortion. The circuit was measured in air. NATURE COMMUNICATIONS | DOI: 10.1038/ncomms4086 ARTICLE

NATURE COMMUNICATIONS| 5:3086 | DOI: 10.1038/ncomms4086 | www.nature.com/naturecommunications 5

&2014Macmillan Publishers Limited. All rights reserved.

G.  Dong,  J.  Verhoeven,  R.  van  Rijn,  N.  Jovanovic,  J.L.  Sambricio,  G.M.  Hijmans,  …

   

(2)

Amorf  

Grafeen:  wat  is  het?

Koolstof  atomen  in  een  kippengaasstructuur  van  één  atoom  dik  

2  April  2014   RF2014  Technology  Days   2  

Grafeen  

(3)

Grafeen:  eigenschappen

Extreem  dun  (één  atoom  dik)  

Transparant  

Extreem  sterk  

Extreem  buigbaar  

Extreem  geleidend  

Extreem  chemisch  resistent  

Eenvoudig  te  modelleren:  populair  in  theoreVsche  wetenschap  

Gemakkelijk  te  ‘tunen’:  funcVonaliseren  van  grafeen  

(4)

Grafeen:  toepassingen

(5)

Grafeen  in  elektronica

Grafeen  als  (super?)geleider  (vervanging  koper,  goud)  

Grafeen  als  halfgeleider  (vervanging  silicium)  

Detectoren  (beweging,  gas,  druk,  etc)  

2  April  2014   RF2014  Technology  Days   5  

Grafeen  als  transistor  

s  

s  

D   G   G  

GRAPHENE APPLICATIONS IN ELECTRONICS AND PHOTONICS

1226 MRS BULLETIN•VOLUME 37•DECEMBER 2012• www.mrs.org/bulletin

order of 1000–10,000 cm 2 V –1 s –1 that are independent of n , and

short-range scattering by neutral defects leads to a temperature-independent mobility that is proportional to 1/ n . 5 , 9 , 12 14

Although a number of different electronic devices based on graphene can be envisioned, we focus here on the most widely explored concept, that of fi eld-effect transistors. Transport in graphene is intrinsically ambipolar, meaning that both positive and negative carriers are important. As illustrated in

Figure 1 a–b, when, through application of the appropriate gate

bias, the Fermi level, E F , is brought below the neutrality point,

E NP (the energy of the Dirac point), transport involves holes,

whereas for E F > E NP , electrons are transported. As the Fermi

energy is changed by the gate, the density of states (DOS) and, correspondingly, the carrier density ( nE F 2 ) are changed. This

is the basis of “switching” in graphene fi eld-effect transistors (GFETs).

However, unlike transistors made of conventional semicon-ductors with a bandgap, a GFET does not turn off completely, even though the DOS is zero at the neutrality point. A residual conductivity, the so-called minimum conductivity ( σ min ),

remains. 16 This is illustrated in Figure 1c , which shows the

variation of the minimum conductivity as a function of the width-to-length ratio ( W / L ) for a graphene FET. 15 , 17 As can be

seen, the conductivity decreases with increasing W / L , and at a high ratio, it approaches the theoretically predicted value 15

of 4 e 2 / π h .

The fact that the current in the graphene channel cannot be completely shut off by the gate limits the achievable current on/off ratio to around 10, although the exact value depends on the quality of the graphene and the effectiveness of the gating. Figure 1d shows the variation of the on/off ratio as a function of the channel length of a GFET operated in the p and n branches of graphene at 4.3 K. 15 The origin of the variation is discussed

later in this section. The key point is that digital transistors used in logic applications require on/off ratios higher than about 10 4 . It is therefore clear that graphene in its natural form is not

appropriate for a digital switch.

The operation of graphene devices is not only dependent on the electrical properties of the graphene material used, but is also strongly affected or even dominated by what happens in other parts of the device. Specifi cally, carriers have to be injected into a graphene channel and then collected through metal contacts. These contacts generate potential energy barriers for carriers, similar to the Schottky barriers in con-ventional semiconductors that strongly affect the performance of those devices. Graphene and metals typically have different work functions, which causes charge transfer between them. This charge transfer leads to the doping of graphene underneath the metal and induces a local band bending. If more-reactive metals such as nickel or platinum are used, there can be signifi cant hybridization and modifi cation of the graphene band structure under them.

A carrier injected into graphene from the metal must overcome or tunnel through a barrier formed at the metal–graphene interface by the charge-transfer process and also another barrier generated at the junction between the thus-doped graphene under the metal and the graphene of the channel (a doping barrier similar to a

pn junction). 18 20 Typically, tunneling through

this barrier is described as a form of Klein tunneling (gapless interband tunneling). 21 , 22 This

transmission ultimately depends on the steepness of the barrier near E F and the angle of incidence.

In practice, experimental factors such as improper metal adhesion and the presence of metal oxides, other impurities, and roughness at the metal–graphene interface can make important contributions to the measured contact resistance. For these reasons, the experimen-tal values of meexperimen-tal–graphene contact resis-tance tend to vary signifi cantly, from a couple

Figure 1. General electrical characteristics of a graphene fi eld-effect transistor (GFET): (a) Ambipolar operation: (Top) Hole conduction between source S and drain D occurs when the Fermi energy E F lies below the neutrality (Dirac) point where the bands meet. (Bottom)

Electron conduction occurs when E F lies above the neutrality point. (b) Schematic of

GFET conductivity versus gate voltage ( V G ), illustrating the minimum conductivity, σ min .

(c) Variation of σ min (scaled to the theoretical minimum conductance 4 e 2 / π h , where e is the

electron charge and h is Planck’s constant) of a GFET as a function of the channel width-to- length ratio ( W / L ) at 300 K (red) and 4.3 K (blue). (d) Ratio of the on current (with a large gate voltage) to the off current (at the minimum) of a GFET as a function of the channel length L . Reproduced with permission from Reference 15 . ©2012, American Chemical Society.

GRAPHENE APPLICATIONS IN ELECTRONICS AND PHOTONICS

1226 MRS BULLETIN•VOLUME 37•DECEMBER 2012• www.mrs.org/bulletin

order of 1000–10,000 cm 2 V –1 s –1 that are independent of n , and short-range scattering by neutral defects leads to a temperature-independent mobility that is proportional to 1/ n . 5 , 9 , 12 14

Although a number of different electronic devices based on graphene can be envisioned, we focus here on the most widely explored concept, that of fi eld-effect transistors. Transport in graphene is intrinsically ambipolar, meaning that both positive and negative carriers are important. As illustrated in

Figure 1 a–b, when, through application of the appropriate gate bias, the Fermi level, E F , is brought below the neutrality point,

E NP (the energy of the Dirac point), transport involves holes, whereas for E F > E NP , electrons are transported. As the Fermi energy is changed by the gate, the density of states (DOS) and, correspondingly, the carrier density ( nE F 2 ) are changed. This is the basis of “switching” in graphene fi eld-effect transistors (GFETs).

However, unlike transistors made of conventional semicon-ductors with a bandgap, a GFET does not turn off completely, even though the DOS is zero at the neutrality point. A residual conductivity, the so-called minimum conductivity ( σ min ),

remains. 16 This is illustrated in Figure 1c , which shows the variation of the minimum conductivity as a function of the width-to-length ratio ( W / L ) for a graphene FET. 15 , 17 As can be seen, the conductivity decreases with increasing W / L , and at a high ratio, it approaches the theoretically predicted value 15 of 4 e 2 / π h .

The fact that the current in the graphene channel cannot be completely shut off by the gate limits the achievable current on/off ratio to around 10, although the exact value depends on the quality of the graphene and the effectiveness of the gating. Figure 1d shows the variation of the on/off ratio as a function of the channel length of a GFET operated in the p and n branches of graphene at 4.3 K. 15 The origin of the variation is discussed later in this section. The key point is that digital transistors used in logic applications require on/off ratios higher than about 10 4 . It is therefore clear that graphene in its natural form is not appropriate for a digital switch.

The operation of graphene devices is not only dependent on the electrical properties of the graphene material used, but is also strongly affected or even dominated by what happens in other parts of the device. Specifi cally, carriers have to be injected into a graphene channel and then collected through metal contacts. These contacts generate potential energy barriers for carriers, similar to the Schottky barriers in con-ventional semiconductors that strongly affect the performance of those devices. Graphene and metals typically have different work functions, which causes charge transfer between them. This charge transfer leads to the doping of graphene underneath the metal and induces a local band bending. If more-reactive metals such as nickel or platinum are used, there can be signifi cant hybridization and modifi cation of the graphene band structure under them.

A carrier injected into graphene from the metal must overcome or tunnel through a barrier formed at the metal–graphene interface by the charge-transfer process and also another barrier generated at the junction between the thus-doped graphene under the metal and the graphene of the channel (a doping barrier similar to a

pn junction). 18 20 Typically, tunneling through this barrier is described as a form of Klein tunneling (gapless interband tunneling). 21 , 22 This transmission ultimately depends on the steepness of the barrier near E F and the angle of incidence. In practice, experimental factors such as improper metal adhesion and the presence of metal oxides, other impurities, and roughness at the metal–graphene interface can make important contributions to the measured contact resistance. For these reasons, the experimen-tal values of meexperimen-tal–graphene contact resis-tance tend to vary signifi cantly, from a couple

Figure 1. General electrical characteristics of a graphene fi eld-effect transistor (GFET): (a) Ambipolar operation: (Top) Hole conduction between source S and drain D occurs when the Fermi energy E F lies below the neutrality (Dirac) point where the bands meet. (Bottom)

Electron conduction occurs when E F lies above the neutrality point. (b) Schematic of

GFET conductivity versus gate voltage ( V G ), illustrating the minimum conductivity, σ min .

(c) Variation of σ min (scaled to the theoretical minimum conductance 4 e 2 / π h , where e is the

electron charge and h is Planck’s constant) of a GFET as a function of the channel width-to- length ratio ( W / L ) at 300 K (red) and 4.3 K (blue). (d) Ratio of the on current (with a large gate voltage) to the off current (at the minimum) of a GFET as a function of the channel length L . Reproduced with permission from Reference 15 . ©2012, American Chemical Society.

(6)

Grafeen  in  HF-­‐‑elektronica

2  April  2014   RF2014  Technology  Days   6  

GRAPHENE APPLICATIONS IN ELECTRONICS AND PHOTONICS

1228 MRS BULLETIN•VOLUME 37•DECEMBER 2012• www.mrs.org/bulletin to another substrate, such as any of the opti-cally transparent substrates used in photonic applications. Once a graphene fi lm is in place, devices can be fabricated in it using electron-beam or photolithography, and oxygen plasma can be used to etch away the unwanted graphene. Metal contacts are formed using some form of metal evaporation.

A key materials issue encountered in the fabrication of graphene devices involves fi nd-ing an appropriate gate dielectric insulator and substrate. To optimize the fi eld effect of the gate, a very thin high-dielectric-constant fi lm is needed. Graphene is both inert and hydro-phobic. Therefore, very thin polar insulators

(e.g., SiO 2 , HfO 2 , Al 2 O 3 ) form poor-quality,

nonuniform, and leaky fi lms on it. In addition, such materials tend to trap charges near or at the insulator–graphene interface, leading to Coulomb scattering and a dramatic decrease

in carrier mobility. 33 A number of different

approaches have been used to address this problem, including deposition of a thin, inert

buffer layer that wets the surface before atomic-layer

deposi-tion (ALD) of the main fi lm, 33 plasma-assisted deposition of

Si 3 N 4 , 34 or deposition of a thin metal fi lm seed layer (usually

aluminum) that is then oxidized in situ prior to ALD of the

insulator fi lm. 35

Because graphene produced by different methods is

uninten-tionally p - or n -doped, there is a need to shift the neutrality point

close to V G = 0 V. This can be accomplished through

compen-sation by choosing the appropriate insulator, for example, AlO x

for CVD graphene or SiN x for epitaxial graphene. A schematic

of the structure and a colorized image of a fabricated RF GFET

are shown in Figure 3 a–b. 36 See the sidebar for a description

of some metrics used to evaluate GFETs.

The fi rst experimental graphene transistors used graphene

exfoliated from graphite and deposited on SiO 2 to initially

make dc 38 , 39 and later RF 36 , 37 , 40 46 GFET devices. The fi rst

technologically relevant efforts utilizing wafer-scale synthe-sized graphene were based on the thermal decomposition

of SiC. 40 44 A highly encouraging result came in 2010, when

wafer-scale RF GFETs were produced with f T values of 100 GHz. 44

However, the lack of a bandgap, the high optical-phonon frequency in graphene, and the presence of defects made

current saturation hard to achieve; g d was large, and thus

volt-age gain was low.

In these early studies, however, the graphene used had a

rather modest mobility of ∼ 1500 cm 2 V –1 s –1 , and the gate length

was, by today’s silicon-industry standards, quite long (240 nm), suggesting that dramatic enhancements in performance could be achieved by additional materials and device improvements. Indeed, the second generation of SiC-based GFETs attained

f T values exceeding 300 GHz, in part by employing channel

lengths as low as 40 nm 17 (see Figure 3c ), and voltage gains up

GFET Metrics

Several metrics are used to evaluate GFETs. Assessment of the intrinsic capabilities of a new channel material, such as graphene, should be insensitive to contact resis-tance and fabrication details. The metric used for this

purpose is the cutoff frequency, f T , which is defi ned

as the frequency at which the current gain becomes 1 when the drain is short-circuited to the source. In a

well-behaved device, f T is given by f T = g m /2 π C , where

g m ( g m = d I /d V G ) and C are the transconductance and

gate capacitance of the device, respectively. 3

In contrast to this indicator of ultimate potential, for working devices, it is the voltage gain that is usually demanded. This voltage gain is defi ned as the ratio of the output voltage (at the drain) to the input voltage (at the gate) and is given by the ratio of the

transconductance, g m , to the output conductance, g d

( g d = d I /d V d ). High voltage gain requires g m to be as

high as possible and g d to be as small as possible. The

latter condition requires that the transistor be operated at conditions of current saturation, where the current is

almost independent of V d .

Many applications also require power gain, for which

the appropriate metric is the maximum frequency, f max ,

which is the frequency at which the unilateral power

gain becomes unity. 3 This metric is strongly dependent

not only on the channel material (i.e., graphene), but also on the actual structure of the device.

Figure 3. (a) Schematic and (b) colorized optical image of a top-gated GFET, in which the voltage on the gate (G) controls the current fl owing in the underlying graphene between the source (S) and drain (D). In both cases, the tan region including the source and drain represents graphene. (c) Current gains of two radio-frequency (RF) GFETs as functions of frequency. One (blue squares) is a CVD graphene FET on a diamond-like carbon (DLC) fi lm for which the current gain extrapolates to unity at f T = 155 GHz, 37 and the other

(red squares) is an epitaxial graphene FET from SiC with f T = 300 GHz. 36

GRAPHENE APPLICATIONS IN ELECTRONICS AND PHOTONICS

1228 MRS BULLETIN •VOLUME 37•DECEMBER 2012• www.mrs.org/bulletin

to another substrate, such as any of the opti-cally transparent substrates used in photonic applications. Once a graphene fi lm is in place, devices can be fabricated in it using electron-beam or photolithography, and oxygen plasma can be used to etch away the unwanted graphene. Metal contacts are formed using some form of metal evaporation.

A key materials issue encountered in the fabrication of graphene devices involves fi nd-ing an appropriate gate dielectric insulator and substrate. To optimize the fi eld effect of the gate, a very thin high-dielectric-constant fi lm is needed. Graphene is both inert and hydro-phobic. Therefore, very thin polar insulators (e.g., SiO 2 , HfO 2 , Al 2 O 3 ) form poor-quality,

nonuniform, and leaky fi lms on it. In addition, such materials tend to trap charges near or at the insulator–graphene interface, leading to Coulomb scattering and a dramatic decrease in carrier mobility. 33 A number of different

approaches have been used to address this problem, including deposition of a thin, inert

buffer layer that wets the surface before atomic-layer deposi-tion (ALD) of the main fi lm, 33 plasma-assisted deposition of

Si 3 N 4 , 34 or deposition of a thin metal fi lm seed layer (usually

aluminum) that is then oxidized in situ prior to ALD of the insulator fi lm. 35

Because graphene produced by different methods is uninten-tionally p - or n -doped, there is a need to shift the neutrality point close to V G = 0 V. This can be accomplished through

compen-sation by choosing the appropriate insulator, for example, AlO x

for CVD graphene or SiN x for epitaxial graphene. A schematic of the structure and a colorized image of a fabricated RF GFET are shown in Figure 3 a–b. 36 See the sidebar for a description

of some metrics used to evaluate GFETs.

The fi rst experimental graphene transistors used graphene exfoliated from graphite and deposited on SiO 2 to initially make dc 38 , 39 and later RF 36 , 37 , 40 46 GFET devices. The fi rst

technologically relevant efforts utilizing wafer-scale synthe-sized graphene were based on the thermal decomposition of SiC. 40 44 A highly encouraging result came in 2010, when

wafer-scale RF GFETs were produced with f T values of 100 GHz. 44

However, the lack of a bandgap, the high optical-phonon frequency in graphene, and the presence of defects made current saturation hard to achieve; g d was large, and thus

volt-age gain was low.

In these early studies, however, the graphene used had a rather modest mobility of ∼ 1500 cm 2 V –1 s –1 , and the gate length

was, by today’s silicon-industry standards, quite long (240 nm), suggesting that dramatic enhancements in performance could be achieved by additional materials and device improvements. Indeed, the second generation of SiC-based GFETs attained f T values exceeding 300 GHz, in part by employing channel

lengths as low as 40 nm 17 (see Figure 3c ), and voltage gains up

GFET Metrics

Several metrics are used to evaluate GFETs. Assessment of the intrinsic capabilities of a new channel material, such as graphene, should be insensitive to contact resis-tance and fabrication details. The metric used for this purpose is the cutoff frequency, f T , which is defi ned

as the frequency at which the current gain becomes 1 when the drain is short-circuited to the source. In a well-behaved device, f T is given by f T = g m /2 π C , where

g m ( g m = d I /d V G ) and C are the transconductance and

gate capacitance of the device, respectively. 3

In contrast to this indicator of ultimate potential, for working devices, it is the voltage gain that is usually demanded. This voltage gain is defi ned as the ratio of the output voltage (at the drain) to the input voltage (at the gate) and is given by the ratio of the transconductance, g m , to the output conductance, g d ( g d = d I /d V d ). High voltage gain requires g m to be as high as possible and g d to be as small as possible. The

latter condition requires that the transistor be operated at conditions of current saturation, where the current is almost independent of V d .

Many applications also require power gain, for which the appropriate metric is the maximum frequency, f max ,

which is the frequency at which the unilateral power gain becomes unity. 3 This metric is strongly dependent

not only on the channel material (i.e., graphene), but also on the actual structure of the device.

Figure 3. (a) Schematic and (b) colorized optical image of a top-gated GFET, in which the voltage on the gate (G) controls the current fl owing in the underlying graphene between the source (S) and drain (D). In both cases, the tan region including the source and drain represents graphene. (c) Current gains of two radio-frequency (RF) GFETs as functions of frequency. One (blue squares) is a CVD graphene FET on a diamond-like carbon (DLC) fi lm for which the current gain extrapolates to unity at f T = 155 GHz, 37 and the other (red squares) is an epitaxial graphene FET from SiC with f T = 300 GHz. 36

s  

s  

D   G   G  

As the last step, the M4 metal level comprising Pd/Au stack was deposited to form resistors and also device source/drain contacts. To illustrate the integration architecture, a tilted view scanning electron microscopic image capturing key circuit components from the wafer completing the gate fabrication, before graphene transfer, is shown in Fig. 1b. All the inter-metal dielectrics as well as gate dielectric were stripped off to reveal the underlying structure. The unique embedded T-shaped gate structure in Fig. 1b, together with the multiple-finger design, provides very low gate resistance while maintaining a short channel length, leading to notably improved fMAXverified from stand-alone RF

transistors built on the same chip (Supplementary Fig. 3)22. The IC consists of 11 components including 3 GFETs, 4 inductors, 2 capacitors and 2 resistors (Fig. 2a,b). The circuit is designed as an RF receiver front-end comprising three stages. Each stage is connected to the next through capacitive coupling; thus, the gate bias (Vg) of each stage can be individually adjusted

to optimize circuit performance. The first two stages are designed

as band-pass amplifiers, providing amplification and filtering of received RF signal. The third stage performs mixing with LO signal that down-converts the GHz RF signal to much lower intermediate frequency (IF) in the MHz range. Although the ambipolar nature of graphene enables several new circuit designs12,23, including subharmonic mixer operation14, these mixers require the Dirac point close to zero gate bias with highly symmetric electron and hole transfer curves for the best performance, and relatively high levels of LO power. In our design, a fundamental drain-pumped mixer is employed since it leads to better performance based on the characteristics of our graphene transistors (shown in Fig. 2d–g), and results in low LO power requirements (o0 dBm). Inductor L4, connected at the drain of mixing FET, serves a double purpose: it resonates the drain capacitance of transistor T3 to provide a large LO voltage swing at the drain terminal, and it attenuates the LO signal leakage towards the IF port. The photo of a fabricated chip in Fig. 2c exhibits arrays of graphene ICs, transistors for

IF LO L1 L2 L3 L4 C1 C2 R1 R2 T1 T2 T3 011010 RF Vg,1 Vd,1 Vg,2 Vg,3 Vd,2 2 cm 2 cm Vg,1 Vd,1 Vd,2 Vg,2 Vg,3 IF out LO in –0.4 –0.5 –0.3 –0.2 –0.1 0.0 –0.2 –0.4 –0.6 –0.8 Vg (V) Vg (V) Vd (V) Vd (V) –0.5 0.0 0.5 1.0 –0.5 0.0 0.5 1.0 T2 T2 T2 T1 T1 T2 T1 T1 T3 T3 T3 T3 0.0 0.1 0.2 0.3 0.4 Dr

ain current (mA

µ m –1) gm (mS µ m –1) 0.0 –0.3 –0.6 –0.9 –1.2 –1.2 –0.9 –0.6 –0.3 0.0 0.1 0.2 0.3 0.4 0.5 0.6 gds (mS µ m –1) Dr

ain current (mA

µ m –1) RF in L1 L2 L3 L4 T1 T2 T3 R2 R1 C1 C2 G G G G

Figure 2 | Circuit diagram and device DC performance.(a) Circuit schematic of three-stage graphene receiver IC comprising 11 active and passive components. (b) Optical micrograph of an IC under testing. The circuit has the dimension of 1,020!600mm2. Scale bar, 100mm. (c) Photo of a fully

processed graphene IC chip. (d) Drain currents as a function of gate biases for three transistors in one circuit and (e) their width normalized

transconductances. The drain biases were"1 V. (f) Drain currents as a function of drain biases and (g) width normalized output conductances from the same devices. The gate biases were 0.25 V for both devices T1 and T2, and 0.75 V for device T3.

NATURE COMMUNICATIONS | DOI: 10.1038/ncomms4086

ARTICLE

NATURE COMMUNICATIONS| 5:3086 | DOI: 10.1038/ncomms4086 | www.nature.com/naturecommunications 3

&2014Macmillan Publishers Limited. All rights reserved.

As the last step, the M4 metal level comprising Pd/Au stack was

deposited to form resistors and also device source/drain contacts.

To illustrate the integration architecture, a tilted view scanning

electron microscopic image capturing key circuit components

from the wafer completing the gate fabrication, before graphene

transfer, is shown in Fig. 1b. All the inter-metal dielectrics as well

as gate dielectric were stripped off to reveal the underlying

structure. The unique embedded T-shaped gate structure in

Fig. 1b, together with the multiple-finger design, provides very

low gate resistance while maintaining a short channel length,

leading to notably improved

f

MAX

verified from stand-alone RF

transistors built on the same chip (Supplementary Fig. 3)

22

.

The IC consists of 11 components including 3 GFETs, 4

inductors, 2 capacitors and 2 resistors (Fig. 2a,b). The circuit is

designed as an RF receiver front-end comprising three stages.

Each stage is connected to the next through capacitive coupling;

thus, the gate bias (

V

g

) of each stage can be individually adjusted

to optimize circuit performance. The first two stages are designed

as band-pass amplifiers, providing amplification and filtering of

received RF signal. The third stage performs mixing with LO

signal that down-converts the GHz RF signal to much lower

intermediate frequency (IF) in the MHz range. Although the

ambipolar nature of graphene enables several new circuit

designs

12,23

, including subharmonic mixer operation

14

, these

mixers require the Dirac point close to zero gate bias with highly

symmetric electron and hole transfer curves for the best

performance, and relatively high levels of LO power. In our

design, a fundamental drain-pumped mixer is employed since it

leads to better performance based on the characteristics of our

graphene transistors (shown in Fig. 2d–g), and results in low LO

power requirements (

o

0 dBm). Inductor L4, connected at the

drain of mixing FET, serves a double purpose: it resonates the

drain capacitance of transistor T3 to provide a large LO voltage

swing at the drain terminal, and it attenuates the LO signal

leakage towards the IF port. The photo of a fabricated chip in

Fig. 2c exhibits arrays of graphene ICs, transistors for

IF LO L1 L2 L3 L4 C1 C2 R1 R2 T1 T2 T3 011010 RF Vg,1 Vd,1 Vg,2 Vg,3 Vd,2

2 cm

2 cm

Vg,1 Vd,1 Vd,2 Vg,2 Vg,3 IF out LO in –0.4 –0.5 –0.3 –0.2 –0.1 0.0 –0.2 –0.4 –0.6 –0.8 Vg (V) Vg (V) Vd (V) Vd (V) –0.5 0.0 0.5 1.0 –0.5 0.0 0.5 1.0 T2 T2 T2 T1 T1 T2 T1 T1 T3 T3 T3 T3 0.0 0.1 0.2 0.3 0.4 Dr

ain current (mA

µ m –1 ) gm (mS µ m –1 ) 0.0 –0.3 –0.6 –0.9 –1.2 –1.2 –0.9 –0.6 –0.3 0.0 0.1 0.2 0.3 0.4 0.5 0.6 gds (mS µ m –1 ) Dr

ain current (mA

µ m –1 ) RF in L1 L2 L3 L4 T1 T2 T3 R2 R1 C1 C2 G G G G

Figure 2 | Circuit diagram and device DC performance.

(

a

) Circuit schematic of three-stage graphene receiver IC comprising 11 active and passive

components. (

b

) Optical micrograph of an IC under testing. The circuit has the dimension of 1,020

!

600

m

m

2

. Scale bar, 100

m

m. (

c

) Photo of a fully

processed graphene IC chip. (

d

) Drain currents as a function of gate biases for three transistors in one circuit and (

e

) their width normalized

transconductances. The drain biases were

"

1 V. (

f

) Drain currents as a function of drain biases and (

g

) width normalized output conductances from the

same devices. The gate biases were 0.25 V for both devices T1 and T2, and 0.75 V for device T3.

NATURE COMMUNICATIONS | DOI: 10.1038/ncomms4086

ARTICLE

NATURE COMMUNICATIONS| 5:3086 | DOI: 10.1038/ncomms4086 | www.nature.com/naturecommunications 3

(7)

Grafeen  in  HF-­‐‑elektronica

2  April  2014   RF2014  Technology  Days   7  

As the last step, the M4 metal level comprising Pd/Au stack was deposited to form resistors and also device source/drain contacts. To illustrate the integration architecture, a tilted view scanning electron microscopic image capturing key circuit components from the wafer completing the gate fabrication, before graphene transfer, is shown in Fig. 1b. All the inter-metal dielectrics as well as gate dielectric were stripped off to reveal the underlying structure. The unique embedded T-shaped gate structure in Fig. 1b, together with the multiple-finger design, provides very low gate resistance while maintaining a short channel length, leading to notably improved fMAX verified from stand-alone RF

transistors built on the same chip (Supplementary Fig. 3)22. The IC consists of 11 components including 3 GFETs, 4 inductors, 2 capacitors and 2 resistors (Fig. 2a,b). The circuit is designed as an RF receiver front-end comprising three stages. Each stage is connected to the next through capacitive coupling; thus, the gate bias (Vg) of each stage can be individually adjusted

to optimize circuit performance. The first two stages are designed

as band-pass amplifiers, providing amplification and filtering of received RF signal. The third stage performs mixing with LO signal that down-converts the GHz RF signal to much lower intermediate frequency (IF) in the MHz range. Although the ambipolar nature of graphene enables several new circuit designs12,23, including subharmonic mixer operation14, these mixers require the Dirac point close to zero gate bias with highly symmetric electron and hole transfer curves for the best performance, and relatively high levels of LO power. In our design, a fundamental drain-pumped mixer is employed since it leads to better performance based on the characteristics of our graphene transistors (shown in Fig. 2d–g), and results in low LO power requirements (o0 dBm). Inductor L4, connected at the drain of mixing FET, serves a double purpose: it resonates the drain capacitance of transistor T3 to provide a large LO voltage swing at the drain terminal, and it attenuates the LO signal leakage towards the IF port. The photo of a fabricated chip in Fig. 2c exhibits arrays of graphene ICs, transistors for

IF LO L1 L2 L3 L4 C1 C2 R1 R2 T1 T2 T3 011010 RF Vg,1 Vd,1 Vg,2 Vg,3 Vd,2 2 cm 2 cm Vg,1 Vd,1 Vd,2 Vg,2 Vg,3 IF out LO in –0.4 –0.5 –0.3 –0.2 –0.1 0.0 –0.2 –0.4 –0.6 –0.8 Vg (V) Vg (V) Vd (V) Vd (V) –0.5 0.0 0.5 1.0 –0.5 0.0 0.5 1.0 T2 T2 T2 T1 T1 T2 T1 T1 T3 T3 T3 T3 0.0 0.1 0.2 0.3 0.4 Dr

ain current (mA

µ m –1) gm (mS µ m –1) 0.0 –0.3 –0.6 –0.9 –1.2 –1.2 –0.9 –0.6 –0.3 0.0 0.1 0.2 0.3 0.4 0.5 0.6 gds (mS µ m –1) Dr

ain current (mA

µ m –1) RF in L1 L2 L3 L4 T1 T2 T3 R2 R1 C1 C2 G G G G

Figure 2 | Circuit diagram and device DC performance.(a) Circuit schematic of three-stage graphene receiver IC comprising 11 active and passive components. (b) Optical micrograph of an IC under testing. The circuit has the dimension of 1,020!600mm2. Scale bar, 100mm. (c) Photo of a fully

processed graphene IC chip. (d) Drain currents as a function of gate biases for three transistors in one circuit and (e) their width normalized

transconductances. The drain biases were "1 V. (f) Drain currents as a function of drain biases and (g) width normalized output conductances from the same devices. The gate biases were 0.25 V for both devices T1 and T2, and 0.75 V for device T3.

NATURE COMMUNICATIONS | DOI: 10.1038/ncomms4086

ARTICLE

NATURE COMMUNICATIONS| 5:3086 | DOI: 10.1038/ncomms4086 | www.nature.com/naturecommunications 3

&2014Macmillan Publishers Limited. All rights reserved.

from leaking into the final IF output. The measured conversion

gain as a function of

P

LO

is also shown in Supplementary Fig. 6.

With drain biases of

!

1.5 V, the whole three-stage IC consumes

less than 20 mW power, 600% lower than single-stage graphene

IC in ref. 16. Figure 4b shows the measured receiver output tones

(

P

1F

,

P

2F

,

P

3F

) as a function of input RF power (

P

RF

); low RF

harmonic distortion (

P

1F

P

2FB

30 dB for

P

RF

¼

0 dBm) indicates

good circuit linearity. The circuit is designed to band-pass filter

the RF input signal before entering the mixer to improve the data

quality by rejecting unwanted signals outside the carrier

frequency band. The effective RF input filtering can be seen

from the sharp frequency response in Fig. 4c (

B

1 GHz of 3-dB

bandwidth). The receiver conversion gain is also measured as a

function of the LO frequency (Fig. 4d).

To best demonstrate the true functionality of the graphene IC,

an RF carrier of 4.3 GHz was amplitude modulated with a bit

stream and sent into the receiver to mimic the typical digital data

transmitted via wireless carrier. Measured single bit waveforms in

Fig. 4e show undistorted IF output signal from the receiver

without the aid of any additional signal amplification, suggesting

that a high-quality receiver function has been achieved. The

original binary code can then be easily recovered by rectification

and low-pass filtering. Figure 4f further shows that bit stream

comprising ASCII code of ‘IBM’ modulated at 20 Mb s

!

1

is

successfully received and demodulated. The modulation rate is

limited by the test equipment, and not by the receiver IC.

Discussion

The demonstration of multifunctional RF ICs built with the

graphene-last flow in Si fab clearly paves the way for seamless

heterogenous three-dimensional (3D) system integration, where

graphene IC’s BEOL can be co-integrated with standard Si CMOS

BEOL as illustrated in Fig. 1a. On the other hand, stacking

conventional semiconductor layers such as Si or III-V into 3D

system is rather complicated and costly, where challenges arise

from high-temperature annealing processes (typically

4

1,000

!

C)

required for each active layer device formation that are not

P3F P2F P1F 0 –20 –40 –60 –50 –30 –10 –2 –1 0 1 2 –2 –1 0 1 2 2 3 4 5 6 2 On On On H 500 ns/ –261.3200 ns T –2.0 mV On 2 3 4 1 20.0 mV/ 3 4

Graphene RF Receiver output signal

01001001 I B M 01000010 01001101 5 6 0 –20 –30 –10 0 –20 –30 –10 Normalized power (dBm)

Normalized power (dBm) Normalized power (dBm)

Output power (dBm) 0 –20 –40 –60 –80 Frequency (GHz) fRF (GHz) fLO (GHz) fLO fRF fRFfLO fIF (GHz) fIF (GHz) PRF= –20 dBm P LO= –2 dBm fRF= 4.3 GHz fLO= 4.2 GHz fLO= 4.2 GHz PRF= 0 dBm PLO= –2 dBm fRF= 4.3 GHz PRF= 0 dBm PLO= –2 dBm PLO= –2 dBm PRF (dBm) 0 10 –20 –40 –30 –10 0.0 2.0 4.0 6.0 8.0 10.0 RF Carrier (4.3 GHz) IF (100 MHz) Rectified/LPF 0 1 0 0 1 0

Figure 4 | Graphene IC measured as RF receiver.

(

a

) Output spectrum of graphene receiver with 900 nm gate length. RF input signal was

!

20 dBm at

4.3 GHz and LO input signal was

!

2 dBm at 4.2 GHz. Down converted IF output signal at 100 MHz (

f

IF

¼

f

RF

!

f

LO

) was

!

30 dBm. (

b

) Normalized

output power of the fundamental tone (

P

1F

), the second harmonic (

P

2F

) and the third harmonic (

P

3F

) as a function of RF power (

P

RF

), showing no gain

compression up to

!

10 dBm

P

RF

. (

c

) Normalized output power as a function of LO frequency. (

d

) Normalized output power as a function of RF.

(

e

) Measured waveforms of RF input signal amplitude modulated at a rate of 20 Mb s

!1

, IF output signal and restored binary code after rectifying and

low-pass filtering IF signal. (

f

) A screenshot of receiver output waveforms taken from the oscilloscope, with LO power of

!

2 dBm at 4.2 GHz. The

original bit stream comprising three letters (24 bits) was recovered by graphene receiver with very low distortion. The circuit was measured in air.

NATURE COMMUNICATIONS | DOI: 10.1038/ncomms4086

ARTICLE

NATURE COMMUNICATIONS| 5:3086 | DOI: 10.1038/ncomms4086 | www.nature.com/naturecommunications

5

& 2014 Macmillan Publishers Limited. All rights reserved.

from leaking into the final IF output. The measured conversion

gain as a function of

P

LO

is also shown in Supplementary Fig. 6.

With drain biases of

!

1.5 V, the whole three-stage IC consumes

less than 20 mW power, 600% lower than single-stage graphene

IC in ref. 16. Figure 4b shows the measured receiver output tones

(

P

1F

,

P

2F

,

P

3F

) as a function of input RF power (

P

RF

); low RF

harmonic distortion (

P

1F

P

2F

B

30 dB for

P

RF

¼

0 dBm) indicates

good circuit linearity. The circuit is designed to band-pass filter

the RF input signal before entering the mixer to improve the data

quality by rejecting unwanted signals outside the carrier

frequency band. The effective RF input filtering can be seen

from the sharp frequency response in Fig. 4c (

B

1 GHz of 3-dB

bandwidth). The receiver conversion gain is also measured as a

function of the LO frequency (Fig. 4d).

To best demonstrate the true functionality of the graphene IC,

an RF carrier of 4.3 GHz was amplitude modulated with a bit

stream and sent into the receiver to mimic the typical digital data

transmitted via wireless carrier. Measured single bit waveforms in

Fig. 4e show undistorted IF output signal from the receiver

without the aid of any additional signal amplification, suggesting

that a high-quality receiver function has been achieved. The

original binary code can then be easily recovered by rectification

and low-pass filtering. Figure 4f further shows that bit stream

comprising ASCII code of ‘IBM’ modulated at 20 Mb s

!1

is

successfully received and demodulated. The modulation rate is

limited by the test equipment, and not by the receiver IC.

Discussion

The demonstration of multifunctional RF ICs built with the

graphene-last flow in Si fab clearly paves the way for seamless

heterogenous three-dimensional (3D) system integration, where

graphene IC’s BEOL can be co-integrated with standard Si CMOS

BEOL as illustrated in Fig. 1a. On the other hand, stacking

conventional semiconductor layers such as Si or III-V into 3D

system is rather complicated and costly, where challenges arise

from high-temperature annealing processes (typically

4

1,000

!

C)

required for each active layer device formation that are not

P3F P2F P1F 0 –20 –40 –60 –50 –30 –10 –2 –1 0 1 2 –2 –1 0 1 2 2 3 4 5 6 2 On On On H 500 ns/ –261.3200 ns T –2.0 mV On 2 3 4 1 20.0 mV/ 3 4

Graphene RF Receiver output signal

01001001 I B M 01000010 01001101 5 6 0 –20 –30 –10 0 –20 –30 –10 Normalized power (dBm)

Normalized power (dBm) Normalized power (dBm)

Output power (dBm) 0 –20 –40 –60 –80 Frequency (GHz) fRF (GHz) fLO (GHz) fLO fRF fRFfLO fIF (GHz) fIF (GHz) PRF= –20 dBm P LO= –2 dBm fRF= 4.3 GHz fLO= 4.2 GHz fLO= 4.2 GHz PRF= 0 dBm PLO= –2 dBm fRF= 4.3 GHz PRF= 0 dBm PLO= –2 dBm PLO= –2 dBm PRF (dBm) 0 10 –20 –40 –30 –10 0.0 2.0 4.0 6.0 8.0 10.0 RF Carrier (4.3 GHz) IF (100 MHz) Rectified/LPF 0 1 0 0 1 0

Figure 4 | Graphene IC measured as RF receiver.(a) Output spectrum of graphene receiver with 900 nm gate length. RF input signal was !20 dBm at

4.3 GHz and LO input signal was !2 dBm at 4.2 GHz. Down converted IF output signal at 100 MHz (fIF¼fRF!fLO) was !30 dBm. (b) Normalized

output power of the fundamental tone (P1F), the second harmonic (P2F) and the third harmonic (P3F) as a function of RF power (PRF), showing no gain

compression up to !10 dBm PRF. (c) Normalized output power as a function of LO frequency. (d) Normalized output power as a function of RF.

(e) Measured waveforms of RF input signal amplitude modulated at a rate of 20 Mb s!1, IF output signal and restored binary code after rectifying and

low-pass filtering IF signal. (f) A screenshot of receiver output waveforms taken from the oscilloscope, with LO power of !2 dBm at 4.2 GHz. The

original bit stream comprising three letters (24 bits) was recovered by graphene receiver with very low distortion. The circuit was measured in air.

NATURE COMMUNICATIONS | DOI: 10.1038/ncomms4086

ARTICLE

NATURE COMMUNICATIONS| 5:3086 | DOI: 10.1038/ncomms4086 | www.nature.com/naturecommunications 5 & 2014Macmillan Publishers Limited. All rights reserved.

(8)

Tussenstand

S-­‐J  Han,  Nature  CommunicaVons,  2014  (DOI:  10.1038/ncomms4086)  

Y.  Wu,  NanoLeeers  12,  2012  (DOI:  10.1021/nl300904k)  

P.  Avouris,  MRS  BulleVn  37,  2012  (DOI:  10:1557/mrs.2012.206)  

2  April  2014   RF2014  Technology  Days   8  

Grafeen:  zeer  veelzijdig,  veelbelovend  

In  elektronica  mogelijk  grensverleggend  

Over  all:  niet  makkelijk  toepasbaar,  kwaliteit  nog  niet  goed  genoeg  

Referenties

(9)

Cruciale  kennis  nodig

Hoe  kun  je  grafeen  maken?  

Hoe  ontstaan  er  fouten  in  het  grafeen?  

Welke  groei-­‐omstandigheden  bepalen  de  uiteindelijke  

eigenschappen  van  grafeen?  

weerstand  

gemiddelde  vrije  weglengte  elektronen  

doping  

(10)

Studie  naar  groei  van  grafeen

schone  omgeving:  ultra  hoog  vacuüm  (p

base

 <  10

-­‐10

mbar)  

 

 

2  April  2014   RF2014  Technology  Days   10  

Chemical  Vapor  DeposiVon  

metaal  substraat  

opdampen  van  koolwaterstoffen  

hoge  temperatuur  

Scanning  Tunneling  Microscopy  

35nm  

(11)

Live  grafeengroei  met  VT-­‐‑STM

2  April  2014   RF2014  Technology  Days   11  

Groei  op  Rhodium  

sterke  Rh-­‐grafeen  binding  

Groei  op  Iridium  

zwakke  Ir-­‐grafeen  binding  

(12)

Opschaling  grafeengroei

Nieuwe,  opgeschaalde  machine  

2  April  2014   RF2014  Technology  Days   12  

Beste  grafeen  ter  wereld  wat  geschikt  

is  toepassing  in  massaproducVe  

(13)

SamenvaEing

Grafeen  is  een  grensverleggend  materiaal  

zeker  ook  in  elektronica  

Unieke  eigenschappen  vereisen  grafeen  van  hoge  kwaliteit  

Fundamentele  kennis  van  synthese  is  essenVeel  om  grafeen  

interessant  te  maken  voor  industrie  

Figure

Figure 4 | Graphene IC measured as RF receiver. (a) Output spectrum of graphene receiver with 900 nm gate length
Figure 2 | Circuit diagram and device DC performance. (a) Circuit schematic of three-stage graphene receiver IC comprising 11 active and passive components
Figure 2 | Circuit diagram and device DC performance. (a) Circuit schematic of three-stage graphene receiver IC comprising 11 active and passive components

References

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