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Bit Wise and Operation

Hardware Modeling of Sorting Mechanism for Finding First Maxima

Hardware Modeling of Sorting Mechanism for Finding First Maxima

... Earlier Bit Wise And operation works with the analogy of Radix sorting which depends on the analysis of x(k) values bit by bit from the MSB to the LSB along with the assumption that the ...

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An Hyper-Elliptic Curve Cryptosystem Scheme Using 3bc Algorithm

An Hyper-Elliptic Curve Cryptosystem Scheme Using 3bc Algorithm

... Note that the process of byte-exchange hides the meaning of 56 byte data, and the exchange of the data block number hides the order of data block, which needs to be assembled later on. In addition, the ...

7

Secure  Binary  Field  Multiplication

Secure Binary Field Multiplication

... 4-bit wise lookup table accesses but it leaks memory access pattern as we pointed out in this ...branch operation leaks power consumption ...branch operation which leaks power consumption ...

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The Effects of Constant and Bit Wise Neutrality on Problem Hardness, Fitness Distance Correlation and Phenotypic Mutation Rates

The Effects of Constant and Bit Wise Neutrality on Problem Hardness, Fitness Distance Correlation and Phenotypic Mutation Rates

... Kimura’s neutral theory of evolution has inspired researchers from the evolutionary computation community to incorporate neutrality into Evolutionary Algorithms (EAs) in the hope that it can aid evolution. The effects of ...

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From  Single-Bit  to  Multi-Bit  Public-Key  Encryption  via  Non-Malleable  Codes

From Single-Bit to Multi-Bit Public-Key Encryption via Non-Malleable Codes

... It is well-known that encrypting each bit of a plaintext string independently is not CCA-secure— the resulting scheme is malleable. We therefore investigate whether this malleability can be dealt with using the ...

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WRL TN 36 pdf

WRL TN 36 pdf

... We can understand this behavior intuitively by looking at the information content of the counter table index. For small predictors, the bimodal scheme is relatively good. Here, the branch address bits used in the bimodal ...

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Ultra Encryption Algorithm (UEA): Bit level Symmetric key Cryptosystem with randomized bits and feedback mechanism

Ultra Encryption Algorithm (UEA): Bit level Symmetric key Cryptosystem with randomized bits and feedback mechanism

... The idea behind this UEA algorithm was to ensure that we devised a method that could handle all possible files. The plain text files have been split into respective bits before applying the aforementioned algorithms. The ...

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Optimization of Weight on Bit During Drilling Operation Based on Rate of Penetration

Optimization of Weight on Bit During Drilling Operation Based on Rate of Penetration

... drilling operation by mean of selecting the best bit weight and rotary speed to achieve minimum ...on bit, rotary speed, bit tooth wear and ...on bit specifically for certain depth in ...

6

On the Implementation of a Low Power IEEE 802 11a Compliant Viterbi Decoder

On the Implementation of a Low Power IEEE 802 11a Compliant Viterbi Decoder

... the remainder of the VD functionality using two distinct clock domains viz. 10 and 80 MHz respectively (shown in Figure 1) and outputting a corrected ‘byte’ instead of a single bit. This arrangement maintains the ...

6

On the Security of Permutation Based Authentication Protocols for Internet of Things Applications: The Case of Huang et al.'s Protocol

On the Security of Permutation Based Authentication Protocols for Internet of Things Applications: The Case of Huang et al.'s Protocol

... The Internet of Things (IoT) is a new technology, which enables objects to exchange data via the Internet. Authentication process is a method to prevent an unauthorized access to the IoT systems. The using of ...

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An Analysis on LSB Image Steganography with Colour Image as Cover

An Analysis on LSB Image Steganography with Colour Image as Cover

... LSB-based steganographic methods embed secret messages into the cover image by directly manipulating the least- significant-bit (LSB) plane. Although it is not the best steganographic method, LSB replacement is ...

6

DEVELOPMENT AND APPLICATION OF A STAGE GATE PROCESS TO REDUCE THE UNERLYING 
RISKS OF IT SERVICE PROJECTS

DEVELOPMENT AND APPLICATION OF A STAGE GATE PROCESS TO REDUCE THE UNERLYING RISKS OF IT SERVICE PROJECTS

... distinctive. Specific records/spots of the pieces with various standards are not respected. For instance, given three hash necessities, the Hamming scope of X and Y is comparable to that of Z and X, even while paying ...

9

Survey On Dont Care Bit Filling Techniques  For Low Power 			Testing

Survey On Dont Care Bit Filling Techniques For Low Power Testing

... For any chip, Power is calculated by P α CV 2 f. It means the switching activity is directly proportional to power dissipation. This paper gives the latest filling techniques of ‘X’ Bits to reduce the switching activity. ...

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Development and Testing of VHDL Interfaces for High Speed Memory Buffering and Data Transmission on FPGA Development Kit for High Speed Digitizer

Development and Testing of VHDL Interfaces for High Speed Memory Buffering and Data Transmission on FPGA Development Kit for High Speed Digitizer

... write operation for DDR3 SDRAM consists of a single 8n-bit wide, one-clock-cycle data transfer at the internal DRAM core and eight corresponding n-bit wide, one-half clock cycle data transfers at the ...

9

Logicalandbitwiseoperations.pdf

Logicalandbitwiseoperations.pdf

... • In a logical shift ,the bits that are shifted out are discarded, and zeros are shifted in (on either , ( end). Therefore, the logical and arithmetic left- shifts are exactly the same operation. However, the ...

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A Multilayer High Speed Magnetic Tunnel Junction Magneto resistive RAM Structure with Read Disturb Detection Circuit by Using Nano Electronics Quantum Dot Cellular Method

A Multilayer High Speed Magnetic Tunnel Junction Magneto resistive RAM Structure with Read Disturb Detection Circuit by Using Nano Electronics Quantum Dot Cellular Method

... Fig.7. Reversible control circuit of MRAM. The write-current of “STT MRAM” is 5 to 10 times higher than the read-current. So, at the time of read to write (when a flip of ‘bit’ cell is required) the magnetic ...

7

Central Data Multibus Octal Serial Interface Mar83 pdf

Central Data Multibus Octal Serial Interface Mar83 pdf

... FEATURES • Synchronous operation S to 8-bit characters Single or double SYN operation Internal character synchronization Transparent or non-transparent mode Automatic SYN or DLE-SYN inse[r] ...

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Faster  Binary-Field  Multiplication   and  Faster  Binary-Field  MACs

Faster Binary-Field Multiplication and Faster Binary-Field MACs

... 15.89 bit operations per bit for the two forward FFTs, 13.75 bit operations per bit for pointwise multiplication, 1 bit operation per bit for the input additions in the ...

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Temporal Performance Analysis of Enhanced 8 Bit RISC Architecture

Temporal Performance Analysis of Enhanced 8 Bit RISC Architecture

... automation applications needs. It has been powered with the 33 instructions [2]. Paper [3] designed an (BSFQ) bit rapid single-flux-quantum microprocessor which is 8 bit and named CORE e4. This CORE e4 has ...

6

4 Level Encryption Using DWT in Image Steganography

4 Level Encryption Using DWT in Image Steganography

... input bit string (ASCII range) and then input a cover image whose size is double of input bit ...new bit string is obtained from calculating old bit string, column value and sign value of ...

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