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Hardware implementations

A  Comprehensive  Performance  Analysis  of  Hardware  Implementations  of  CAESAR  Candidates

A Comprehensive Performance Analysis of Hardware Implementations of CAESAR Candidates

... their hardware performance, which clearly needs more ...basic hardware imple- mentation [14]. However, the implementations are done on various platforms, for different ...available hardware ...

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Suit  up!  Made-to-Measure  Hardware  Implementations  of  Ascon

Suit up! Made-to-Measure Hardware Implementations of Ascon

... in hardware, these are the goals of the CAESAR authenticated encryption ...in hardware and optimized for different typical applications to fully explore A SCON ’s design ...present hardware ...

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Side-Channel  Analysis  of  MAC-Keccak  Hardware  Implementations

Side-Channel Analysis of MAC-Keccak Hardware Implementations

... MAC-Keccak hardware implementations is vulnerable to side-channel ...software implementations because software implementations have all the steps executed in serial and the intermediate ...

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Hardware Implementations Of Svm On Fpga: A State-Of-The-Art Review Of Current Practice

Hardware Implementations Of Svm On Fpga: A State-Of-The-Art Review Of Current Practice

... proposed hardware reduction method and an additional novel response evaluation ...Applications Implementations This group was constructed to demonstrate the usage of the SVM classification in a wide range ...

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Efficient  Hardware  Implementations  of  the  Warbler  Pseudorandom  Number  Generator

Efficient Hardware Implementations of the Warbler Pseudorandom Number Generator

... In this paper, we have presented hardware implementations of Warbler in CMOS 65nm and CMOS 130nm ASICs. We proposed an architecture that takes advantage of standard registers without chip- enable signals. ...

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Hardware Implementations for Symmetric Key Cryptosystems

Hardware Implementations for Symmetric Key Cryptosystems

... Cryptographic algorithms play essential role in communications systems security. In general, the di ff erent deployed cryptosystems are divided into two categories of asymmetric key and symmetric key [82]. Schemes from ...

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Efficient Linear Matrix Solver and Its Hardware Implementations Dedicated to Faster-Than-Real-Time Dynamic Simulation of Large Scale of Power System.

Efficient Linear Matrix Solver and Its Hardware Implementations Dedicated to Faster-Than-Real-Time Dynamic Simulation of Large Scale of Power System.

... In our hardware implementation, we have performed bundles of experiments on OpenMP on multi-core CPU architecture. We implemented our OpenMP experiments on 4-core, 8-thread 4 th generation i-7 Intel CPU Desktop ...

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L}ow Power Architecture Design of De-Blocking Filter and Hardware Implementations in H.264/{AVC

L}ow Power Architecture Design of De-Blocking Filter and Hardware Implementations in H.264/{AVC

... The proposed DF hardware architecture is implemented in Verilog RTL codes. They are verified with RTL simulations and the results are matched with the JM reference software, for the same rate-distortion ...

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Methodologies for power analysis attacks on hardware implementations of AES

Methodologies for power analysis attacks on hardware implementations of AES

... During each cycle of the transfer state, the data from the registers is inverted. That means during each cycle, some data lines are being pulled high. However, the long routing across the Logic Locked design are only ...

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Linear  Regression  Side  Channel  Attack  Applied  on  Constant  XOR

Linear Regression Side Channel Attack Applied on Constant XOR

... Figure 2 illustrates the first round of AES with whitening key. In T-table software or round based hardware implementations, there is leakage in Y , the output of first round. Taking one byte of Y as target ...

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maskVerif:  automated  analysis  of  software   and  hardware  higher-order  masked  implementations

maskVerif: automated analysis of software and hardware higher-order masked implementations

... Hardware implementations. As recalled in the previous section, Bloem et al. [9] provide a tool for proving probing security of masked implementations in the ISW model with glitches. While this tool ...

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FPGA Implementation of RECTANGLE Block Cipher Architectures

FPGA Implementation of RECTANGLE Block Cipher Architectures

... different implementations, it is hard to choose the appropriate security primitive for an ...various hardware implementations of lightweight block cipher RECTANGLE is proposed like Iterative design, ...

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The  Simeck  Family  of  Lightweight  Block  Ciphers

The Simeck Family of Lightweight Block Ciphers

... different hardware architectures in order to make a balance between area, throughput, and power consumption for Simon and Simeck in both CMOS 130nm and CMOS 65nm ...the hardware implementations of ...

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High level synthesis FPGA implementation of the Jacobi algorithm to solve the Eigen problem

High level synthesis FPGA implementation of the Jacobi algorithm to solve the Eigen problem

... systolic implementations where speed is the most important requirement [19, 20], serial designs where low resource consumption is selected [1, 21], and a meet in the middle approach (semiparallel) where both ...

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Masking  the  AES  with  Only  Two  Random  Bits

Masking the AES with Only Two Random Bits

... Manually tracking the masks as they propagate through the implementations quickly becomes a very complex task as the implementation size increases. We thus decided to develop an automated approach to create a ...

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Smart Grid Technologies and Implementations

Smart Grid Technologies and Implementations

... Since 2010, papers and researches on smart grid have paid attention to intelligent system monitoring. Some of the last implementations of Power system frequency monitoring network (FNET) applications on wide-area ...

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High speed hardware architecture for implementations of multivariate signature generations on FPGAs

High speed hardware architecture for implementations of multivariate signature generations on FPGAs

... signature implementations. A high-speed hardware architecture for signature generations of a multivariate scheme is proposed in this ...high-speed hardware architecture based on the above ...

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The Implementation of Enterprise Resource Planning Systems in Different National and Organisational Cultures

The Implementation of Enterprise Resource Planning Systems in Different National and Organisational Cultures

... Contributionsfor ERP implementations: A methodis proposedfor eliciting elementsof organisationaland national culture that are critical to ERP implementations; A set of cultural predictio[r] ...

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Framework Implementation on Managing Visitors with Smart Card Authentication at Malaysia National Park

Framework Implementation on Managing Visitors with Smart Card Authentication at Malaysia National Park

... card implementations is worthy to ...application implementations were analyzed and ...card implementations which identified the factor to consider and the smart card impact has supported the design ...

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Instance Strategy for IT Implementations

Instance Strategy for IT Implementations

... ABSTRACT: Multiple factors affect instance strategy for an IT implementation. These can be classified into four areas: Government Regularity factors, Business Strategy, Functional Requirements, and Technology ...

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