insulated gate bipolar transistors
Piezoelectric Transformers to the Future Integrated IGBT Gate Drivers
... In the coming area of ubiquitous computing, nanotechnology, increasingly compact or miniaturized power sources and preferably mobile & satellite systems are expected. In this paper, the application of piezoelectric ...
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AC voltage sag-swell compensator based on unified non-inverting and inverting output voltage AC chopper
... back-to-back insulated gate bipolar transistors (IGBTs) are employed, and an inner inductor L and output capacitor C are used as energy storage elements to extend the voltage output ...
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Optimizing the train-catenary electrical interface in AC railways through dynamic control reconfiguration
... Insulated-Gate Bipolar Transistors (IGBT) based con- verters (single H-bridges, interleaved bridges or mul- tilevel converters) operate under some kind of pulse- width modulation (PWM) ...
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Generation of short electrical pulses based on bipolar transistors
... Figure 9 gives an overview of different pulse shapes with different polarities and pulse durations. As mentioned above, the pulse polarity can be determined by the choice of the tran- sistor technology (npn or pnp) and ...
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Performance of Dual Edge Triggered (DET) Flip-Flops Using Multiple C-Elements
... The flip-flops were implemented in the 180nm CMOS technology. Implementations were optimized for minimum energy-delay product. For the optimization step, the delay metric was the maximum CK-Q delay because it is ...
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NAND GATE USING FINFET FOR NANOSCALE TECHNOLOGY
... of transistors with each new generation of bulk CMOS technology has yielded continual improvement in the performance of digital ...sub-45nm gate lengths include short channel effects, sub-threshold leakage, ...
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A novel technique for CAD-optimization of analog circuits with bipolar transistors
... parameters of the devices under optimization. Let assume, that i ≤ l sweeping parameters are used to sweep the model card parameters of j uncorrelated devices from one and the same type. The latter results in i × j ...
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Aluminium oxide prepared by UV/ozone exposure for low-voltage organic thin-film transistors
... thin-film transistors due to their low-temperature processing and compatibility with plastic substrates have become an attractive choice for such ...Here transistors with low operating voltages and high ...
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High-voltage circuits for power management on 65 nm CMOS
... Figure 12 shows the output and the drain current of this work (A) in comparison to previous work B (Serneels and Steyaert, 2008) with a supply voltage of 4 V. In the previous work, the gate voltages of the second ...
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Available online: https://edupediapublications.org/journals/index.php/IJR/ P a g e | 5674 Design of Aging-Aware Reliable Multiplier with Adaptive Hold Logic Using Variable Latency Techniqu
... The details of the operation of the AHL circuit are as follows: when an input pattern arrives, both judging blocks will decide whether the pattern requires one cycle or two cycles to complete and pass both results to the ...
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Electrochemical Single-Molecule Transistors with Optimized Gate Coupling
... electrolyte gate coupling is observed with a calculated gate coupling efficiency of 100 ...%. Gate coupling efficiency for the viologen system in aqueous electrolytes is considerably lower at 20 ...
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Ordering of In and Ga in Epitaxially Grown In0 53Ga0 47As Films on (001) InP Substrates
... InGaAs, one of the III-V ternary alloys, is utilized in electronic devices such as high electron-mobility transistors HEMT17 or hetero bipolar transistors HBT.18 The atomic ordering in I[r] ...
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Adiabatic Split Level Charge Recovery Logic Circuit
... NAND gate comprising of two NMOS transistors in pull down network connected in series and two PMOS transistors in pull network connected in parallel is simulated using a time varying supply and its ...
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Associative learning with Y shaped floating gate transistors operated in memristive modes
... conductance of the Y-shaped quantum dot floating gate transistor depends on the amount of localized charges on quantum dots (QDs) that are precisely positioned in the two input terminals. Emulating external ...
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Silicon Germanium Heterojunction Bipolar Transistors for Extremely Low Noise Applications
... Another very important issue that has not been addressed in the experimental portion of this work is the correlation of the shot-noise sources in the noise model. As the correlation term was ignored in the noise modeling ...
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Vol 2, No 11 (2014)
... controlled Insulated Gate Bi- polar Transistor (IGBT) based Voltage Source Converters (VSCs) with a battery energy storage system (BESS) for an isolated wind-hydro hybrid system using two squirrel cage ...
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Demonstration of hetero-gate-dielectric tunneling field-effect transistors (HG TFETs)
... field-effect transistors (MOSFETs) when supply voltage is reduced because subthreshold swing (SS) of MOSFETs cannot be lower than 60 ...field-effect transistors (HG TFETs) are investigated as one of the ...
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Gate Stack Design for Threshold Voltage Control of Gallium Nitride Power Transistors.
... HFET gate stack band diagram of a charged device with an operation gate bias applied (15 V for the purpose of this simulation). In this situation, electrons are prevented from moving to the charge storage ...
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Characterization of integrated bipolar transistors using computer aided measurements and optimisation
... diode capacitance C Id be obtained using optimization, cou bc' the author concludes that, the low frequency measurements on these components is not essential... This is to avoid approxim[r] ...
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All-polymer field-effect transistors using a brush gate dielectric
... polymer from the surface rst requires an initiator layer, which self-assembles on the surface. A gold electrode presents an ideal surface for thiol-terminated initiators. The surface must be imperfection free to support ...
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