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Network-on-a-chip

Overview of  the technology Network-on-Chip

Overview of the technology Network-on-Chip

... on chip or network on a chip (NoC or NOC) is a communication subsystem on an integrated circuit (commonly called a “chip” ),typically between intellectual property (IP) cores in a system on a ...

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A Study on Network-On-Chip architecture using Genetic Algorithm

A Study on Network-On-Chip architecture using Genetic Algorithm

... specific Network-on-chip (NoC) topology and routes the communication traces on the interconnection ...network. Network-on-chip (NoC) is a new paradigm for designing scalable ...

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An Efficient Directional Routing Algorithm For Network On Chip

An Efficient Directional Routing Algorithm For Network On Chip

... the network as an Index of traffic load balancing since Dmesh is capable of delivering better- integrated services and of tolerating ...inter-connection network latency, but to enhance the use of the ...

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Title :    AFPGA BASED INTRUSION DETECTION SYSTEM USING COUNTING BLOOM FILTERAuthor (s) : Karthick Manoj

Title : AFPGA BASED INTRUSION DETECTION SYSTEM USING COUNTING BLOOM FILTERAuthor (s) : Karthick Manoj

... filter-based Network Intrusion Detection “system-on- chip” ...FPGA chip) implemented on a SPARTAN-3 FPGA ...a Network Intrusion Detection system, test it with real-world threats and present ...

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Design of low power network on chip using data encoding techniques

Design of low power network on chip using data encoding techniques

... The network is dependent on the ability of the signal to travel around the ...entire network is affected or stops ...communication network. In the switched network methodology, the ...

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Reliability and Performance Evaluation of Fault-aware Routing Methods for Network-on-Chip Architectures (RESEARCH NOTE)

Reliability and Performance Evaluation of Fault-aware Routing Methods for Network-on-Chip Architectures (RESEARCH NOTE)

... An approach to achieve reliable NoCs is incorporated network level fault-tolerance by designing fault-tolerant routing algorithms. For this purpose, many fault-tolerant routing algorithms have been designed for ...

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VHDL Implementation Of Reconfigurable Crossbar Switch For Binoc Router

VHDL Implementation Of Reconfigurable Crossbar Switch For Binoc Router

... Abstract: Network-on-Chip (NoC) is the interconnection platform that answers the requirements of the modern on-Chip ...for Network On ...

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Distance 
		routing on mesh network on chip

Distance routing on mesh network on chip

... NoC (Network on Chip) is a promising technology for the interconnection network. Performance of an interconnection network depends on the routing logic. We explore the state of art of the ...

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Modeling router hotspots on network-on-chip

Modeling router hotspots on network-on-chip

... Traditional designs borrowed from local area networks (LANs) result in limiting performance bottleneck. Some new switching techniques, such as virtual cut- through (VCT) and wormhole switching techniques have been ...

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Review on Network on Chip (NoC) Topology

Review on Network on Chip (NoC) Topology

... mesh network, each network node is connected to every other node in the ...mesh network require some kind of routing logic so that the data traveling over the network take the shortest path ...

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Relaiblity and Fault Analysis in On Chip Network

Relaiblity and Fault Analysis in On Chip Network

... This project work presents a modelsim simulated result of virtual channel router architecture. The virtual channel allocations can provide performance improvement similar to wormhole router configuration for on ...

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DESIGN OF 8-PORT ADAPTIVE NETWORK ON CHIP

DESIGN OF 8-PORT ADAPTIVE NETWORK ON CHIP

... Abstract— Networks-on-chip (NoCs) have emerged as a promising on-chip interconnect for future multi/many-core architectures as NoCs are able to scale communication links with the growing number of cores. In ...

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FPGA IMPLEMENTATION OF ARBITERS ALGORITHM FOR NETWORK-ON-CHIP

FPGA IMPLEMENTATION OF ARBITERS ALGORITHM FOR NETWORK-ON-CHIP

... The router switches with a set of inter- communicating ports that define the physical layer of the NoC system. There are two types of ports to establish communications, namely input and output ports. The communication is ...

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Network-on-Chip Architecture Based on Cluster Method

Network-on-Chip Architecture Based on Cluster Method

... 462 algorithms are complex[1], [5]. According to the insertion algorithm proposed by [1], we have to consider all the possibilities when we just insert one long-range link. After comparing the performance of all the ...

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Review on Network on Chip (NoC) Router Design

Review on Network on Chip (NoC) Router Design

... star network consist router in the middle position of the star, this router having large capacity, and other computational resources or sub networks in the spikes of the ...

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Implementation Of Network On-Chip Using GALS Scheme

Implementation Of Network On-Chip Using GALS Scheme

... on- chip communication issue of a SOC ...of Network-on-Chip (NOC) has been proposed as a solution at the beginning of 2000s, The idea of NOC is to separate the concerns of communication from ...

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A Survey Of FAT – TREE Network – On – Chip Topology

A Survey Of FAT – TREE Network – On – Chip Topology

... the network elements (IP cores, Links and ...other network complexities such as load imbalance and under utilization of network ...the network per unit of ...

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Design of Network on Chip with an Arbiter

Design of Network on Chip with an Arbiter

... A rapid progress in Very Large Scale Integration (VLSI) in the past recent years has resulted in the fabrication of millions of transistors on a single silicon chip. With the current CMOS technology it is ...

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Network-on-chip network adapter

Network-on-chip network adapter

... several links. Routing decisions are made at the routers. The routers and links transport data from one destination to another, and network adapter (NA) decouples communication from computation by providing the ...

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On-Chip Permutation Mesh Network for MPSOCs  Network-on-Chip

On-Chip Permutation Mesh Network for MPSOCs Network-on-Chip

... Mesh network is a family of multistage networks, applied to build scalable multiprocessors with thousands of nodes in macro ...mesh network is defined as , where represents the number of inputs for of ...

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