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Fabrication parameters dependent morphology variation of silicon thin film

Fabrication parameters dependent morphology variation of silicon thin film

Abstract. Achieving two dimensional quantum structure of silicon with well- defined tuneable morphology is an outstanding issue. We present the preliminary results on fabrication parameters dependent silicon thin film production using VHF-PECVD method. Five samples are prepared on Si(100) substrate with gold (Au) catalyst by adjusting different parameters such as deposition time, temperature and the flow of precursor gas. The samples morphology are analysed using FESEM. The results reveal that the silicon thin film appear to be smooth and crystal-like after an enormous amount of hydrogen is inserted together with the precursor gas (silane) during the deposition process. More interestingly, the films exhibit silicon nanowires as the deposition time is increased up to 1 hour. This morphological transformation is attributed to the vapour-liquid-solid (VLS) mechanism related to the deposition process. Our results may contribute towards the development of nanosilicon based optoelectronics.

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Crystallization of polycrystalline silicon thin film by excimer laser annealing

Crystallization of polycrystalline silicon thin film by excimer laser annealing

Noriah Bidin and Siti Noraiza Ab. Razak. Crystallization of Polycrystalline Silicon Thin Film By Excimer Laser Annealing ELA. Proceedings of Faculty of Science Postgraduate Conference, Ibnu Sina Institute, UTM, Johor Bahru. 5-7 Oct 2010, pp 213-219.

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Fabrication and Analysis of Carbon Doped Hydrogenated Amorphous Silicon Thin Film Transistors

Fabrication and Analysis of Carbon Doped Hydrogenated Amorphous Silicon Thin Film Transistors

Abstract Thin film transistors (TFT) are mainly used in display devices such as a LCD display or a LED display, as a current switch. This paper focuses on analysis of thin film transistors fabricated using carbon doped amorphous silicon as the semiconductor layer (a-Si:C:H). Radio Frequency Plasma Enhanced Chemical Vapour Deposition (RF-PECVD) technique was used to deposit the semiconductor active layer of a-Si:C: H as well as the dielectric silicon nitride layer. Thermal evaporation was used for depositing Aluminium as the gate, source and drain electrodes. Results from UV-VIS-NIR spectrophotometer suggests that the optimised semiconductor active layer with a thickness of 113 nm, exhibited a bandgap value of 1.88 eV. The TFT based on this a-Si:C:H showed linear I-V characteristics as measured using a semiconductor device analyser. Further a thin layer of diborone (B 2 H 6 ) doped p type a-Si: H was added on top of the active layer (a-Si:C:H)

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Development of low temperature oxidation for crystalline silicon thin film transistor applications

Development of low temperature oxidation for crystalline silicon thin film transistor applications

In order to further investigate the anneal properties, SIMS measurements were performed on the samples shown in Section 5.3. Quantification of fluorine concentration was performed using a known standard. Only relative intensity values were obtained for other elements. Figure 51-55 show the complete SIMS profile for each of the three samples measured. Note that a spike in sodium and potassium concentration exists at the oxide silicon interface. This is a contaminant in the MOS system, and is undesirable for device performance. The source of this contaminant is not known. It is possible that an interaction with fluorine increases this effect, however this mechanism is not known, and the contamination may be inherent to the oxidation tube regardless of use of fluorine.

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Magnetron Sputtering Silicon Thin Film Electrodes for Lithium-Ion Batteries

Magnetron Sputtering Silicon Thin Film Electrodes for Lithium-Ion Batteries

Nano-sized silicon materials with different architectures may be resistant to mechanical failure in case of multiple insertion/extraction of Li and can significantly improve Li transport, as demonstrated by numerous studies (e.g., [7-27]) and summarized in recent reviews [1-6]. However, their preparation techniques are often complicated and very expensive, which limits the use of such materials in commercial batteries. Among them, thin film growth techniques based on various deposition methods are the most practicable, and thin-film electrodes themselves have several advantages over bulk materials in Li-ion batteries, as it was emphasized in [9, 18]: they usually ensure better stability and capacity retention, operate kinetically faster due to shorter pathways for Li + insertion/extraction, and demonstrate high specific capacities. The most common methods to obtain thin silicon films are magnetron sputtering [7, 9, 10, 18, 21, 25-28], thermal evaporation [12, 14, 15, 16, 29], and vapor deposition [11, 13, 17, 30]. Among them, magnetron sputtering seems to be very promising due to the ease of its use; in addition, this method ensures good adhesion between particles and the current collector substrate due to the Si/Cu interdiffusion [7, 21, 26].

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Thin Film Silicon Photovoltaics: Characterization of Thin Film Deposition and Analysis of Enhanced Light Trapping from Scattering Nanoparticle Arrays

Thin Film Silicon Photovoltaics: Characterization of Thin Film Deposition and Analysis of Enhanced Light Trapping from Scattering Nanoparticle Arrays

fast deposition rates, and passivation of defects due to hydrogen inclusion, while at the same time offering scalability, low cost, and a low-temperature deposition process that permits the use of low cost substrates. HWCVD silicon thin film solar cells deposited on inexpensive soda lime glass have the potential to match the efficiency of wafer-based silicon solar cells at the low cost of a-Si thin film-based cells [17]. For this reason the growth of silicon thin films via this method has been investigated, with optimal deposition conditions evaluated for high-quality thin film growth. As will be discussed in detail in the course of this chapter, an examination of films deposited on crystalline silicon substrates reveals epitaxial growth, while silicon films grown on glass substrates demonstrates significant crystalline fractions despite the absence of a seed layer. This result demonstrates the potential for the fabrication of device-quality silicon layers on inexpensive substrates. However, these films are not fully crystalline and can have varying physical structures depending on the deposition conditions that affect the material and electrical characteristics. While thin-film devices can tolerate a higher density of defects due to the decrease in necessary path length for efficient carrier collection, the increased surface-to-bulk ratio increases the significance of sur- face geometry and defects, while a finite grain size increases the likelihood of bulk recombination at trap sites between the grains. Efficient carrier collection requires sufficient passivation at grain boundaries to increase the probability of minority carri- ers diffusing to the junction rather than combining at these boundaries; the degree of defect passivation determines in large part the optimal electrical performance achiev- able by photovoltaic devices fabricated from these films. This study therefore focuses on the correlation between both bulk and surface passivation with the electrical prop- erties of the films, with the goal of maximizing the stabilized performance of HWCVD films for use in thin-film silicon solar cells.

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Structural and electrical characterization of Bi2VO5 5 / Bi4Ti3O12 bilayer thin films deposited by pulsed laser ablation technique

Structural and electrical characterization of Bi2VO5 5 / Bi4Ti3O12 bilayer thin films deposited by pulsed laser ablation technique

ness (~ 175 nm) of the individual layers was maintained in bilayer films. The BTO layer was grown first on pla- tinized silicon substrate and then immediately followed by the growth of BVO layer without any delay in order to maintain the sharp interface between the two layers. The sequence of the layers was also reversed, but not much difference in terms of physical properties was ob- served, hence the one bilayer structure i.e. BVBT bilayer is discussed as a symbolic representative one.

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Effects of the electrical conductivity and orientation of silicon substrate on the synthesis of multi walled carbon nanotubes by thermal chemical vapor deposition

Effects of the electrical conductivity and orientation of silicon substrate on the synthesis of multi walled carbon nanotubes by thermal chemical vapor deposition

catalytic particles could more easily migrate on Si(100) surface by thermal energy. Under these conditions, there exists a high probability of Fe particle agglomeration. In- deed, it was observed that the average diameter of Fe particles on Si(100) substrate was larger than that on Si (111) substrate. When the metal thin film is annealed, particles are formed by film coarsening, and then, they could agglomerate or break down through surface mi- gration, driven by a thermally activated process resulting in a minimization of the surface energy of the metal film-substrate system.

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Electrical Characterization of Radiation Induced Defects in 3C-SiC.

Electrical Characterization of Radiation Induced Defects in 3C-SiC.

32 The first step taken to fabricate diodes from 3C-SiC was the obtainment of silicon substrates with the desired p-type doping concentration. Since it is desired to observe the damage in the SiC rather than the silicon, a low resistivity substrate (relative to the 3C-SiC) is necessary to ensure the depletion region in the device is primarily in the 3C-SiC by volume. In this case, the resistivity of the silicon should be on the order of 0.002 Ω-cm since the resistivity of the 3C-SiC grown in the NCSU clean room is on the order of 0.02 to 0.04 Ω-cm. With the appropriate resistivity substrate, n-type 3C-SiC is then grown on the silicon substrates via chemical vapor deposition. This procedure is performed in a furnace at 900°C by flowing the gases outlined in section 2.2. Again, the n-type dopants are introduced by the addition of ammonia gas to the process. The nitrogen in the ammonia is the n-type dopant. Once 3C-SiC is grown on the silicon, ohmic contacts are placed on the silicon substrate and the 3C-SiC layer in order to provide optimal current flow through the device. The contact placed on the silicon substrate is gold, which is sputtered on the surface. The contact on the 3C-SiC is aluminum which is evaporated onto the surface. This completed device will provide a structure creating an IV curve with the desired properties resulting from mostly the silicon carbide.

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Synthesis and Evaluation of the Semiconductor Behavior in Vanadium Indanone Derivatives Thin Films

Synthesis and Evaluation of the Semiconductor Behavior in Vanadium Indanone Derivatives Thin Films

New vanadium complexes were synthesized with moderated yields with an easy and clean reaction and were also characterized. Due to their physical properties, vanadium indanone thin films were deposited by thermal vacuum evaporation. Thin film morphology seems to depend on the molecular structure of the ligand around de vanadium atom; polarity in the radical of ligand is a decisive factor for the morphology and thickness of the formed film. The optical band gap was calculated and the values were found to be around 2.7 eV for indirect transitions. Differences in the GAP values were possibly related to factors such as the radical in the molecule, differences in size of the particles in the film and the molecular overlap of the thin film. 2-benzylidene-1-indanone vanadiummultilayer struc- ture involving conductor-semiconductor interfaces has been fabricated using ITO and silver contact materials among others. The incidence radiation with different wavelengths on the device produced an ohmic behavior at values lower than 7 V, while an SCLC mechanism at values higher than 7 V was evidence. The effect of temperature on the conductivity was also evaluated and showed typical semiconducting characteristics. The existence of trap levels is confirmed by the presence of three linear portions in the ln σ vs. 1 / T plots. From this work, ITO/nylon 11/vanadiumindanone/Agarrangements show potentially useful elec- tronic properties that may be employed in the production of electronic devices for optoelectronic applications.

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Thin Film Silicon for Implantable Electronics

Thin Film Silicon for Implantable Electronics

Metal-induced crystallization (MIC) is a metal-induced transformation of amorphous silicon into crystalline silicon. Silicide, or Si-metal alloys are common materials in VLSI circuits. It is well known that the interactions between some metals, such as Al and Au, and amorphous silicon induce the crystallization of amorphous silicon at temperatures much lower than those of SPC processes. Though the kinetics of such a low temperature crystallization process has not been established, most of the experimental data show that addition of a small amount of metal impurities can dramatically enhance the crystallization of amorphous silicon at low temperatures. The reaction between a metal and amorphous silicon occurs at the interface and it lowers the crystallization temperature. Metal used as contact layers in metal/a-Si structures can be classified into two groups: silicide forming metals (Ni [28][29], Co, Cr, Pd [30], and Pt) and elemental metals that do not form silicides (Al [31][32], Ag, Au [33][34], and Sb). Thin-film transistors made of pc-Si crystallized via MIC processes show electron mobility of 121 cm 2 /Vs [28].

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Thin Film Silicon Nanowire/PEDOT:PSS Hybrid Solar Cells with Surface Treatment

Thin Film Silicon Nanowire/PEDOT:PSS Hybrid Solar Cells with Surface Treatment

It is noted that the simulated reflectance spectrum of the R-SiNW structure is not as low compared to the ex- perimental results shown in Fig. 9b, especially in a lon- ger wavelength range. The deviation can be attributed to the fact that our simulation does not reflect a truly ran- dom structure but rather a quasi-random one. Besides, there are other factors not taken into account in our simulation, which include variation in the SiNW length, non-vertical alignment of the SiNWs, the rough surface and the imperfect cylinder shape of the SiNWs, and the rough coverage of the PEDOT:PSS layer on SiNWs. In addition, due to the computing resource constraints, our simulation was performed for a thinner Si film of 2.2 μm instead of the thicker 10.6 μm Si film that was used in the experimental structure. Nevertheless, the simulation results clearly reveal the effect of the randomness of the MCEE SiNWs on enhancing the scattering and absorp- tion of light in SiNW/PEDOT:PSS hybrid cells.

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Characterization of Phosphoric Acid Doped N-type Silicon Thin Films Printed on ITO Coated PET Substrate

Characterization of Phosphoric Acid Doped N-type Silicon Thin Films Printed on ITO Coated PET Substrate

structures, which were clearly distinguished from polycrystalline structures to microcrystalline increase of doping concentrations. Structural changes caused by variation of the film composition affected the electrical resistivity and carrier concentrations. The dependence of resistivity and carrier Hall mobility on seeding layer thickness could be correlated with the differences in morphological changes observed by AFM and SEM. Thicker seeding layers give crystallized films with more gross defects, which are reflected in higher resistivity and lower mobility for both types of dopants. Since such gross defects were not observed in the films, it is possible that the morphological appearance and electrical performance of the Si films’ structure would be further improved as the layer thickness decreases. This is suggested by the reduction of induced defects with the thinner seeding layer, and there should be an ultimate lower limit of the seeding layer thickness capable of inducing acceptable crystallization in the silicon layers. Phosphorus doping is cased defects can be involved to explain this increase of the defect density by doping. Also, the increase of the electrical resistivity in slightly doped poly-Si is due to doping-affected defects. The electrical properties of screen printed n-Si carried out by Hall Effect measurement are listed in Table 3.

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Characterisation of thin film silicon films deposited by plasma enhanced chemical vapour deposition at 162MHz, using a large area, scalable, multi tile electrode plasma source

Characterisation of thin film silicon films deposited by plasma enhanced chemical vapour deposition at 162MHz, using a large area, scalable, multi tile electrode plasma source

The topology of a segmented electrode source imposes a special structure in the plasma, this structure has been shown to be dependent on deposition parameters [15]. It is important to understand the effect this structure has on the silicon layers deposited. To this end; deposition rate across and between neighbouring tiles was observed for different experimental

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150°C amorphous silicon thin-film transistor technology for polyimide substrates

150°C amorphous silicon thin-film transistor technology for polyimide substrates

at 300-350°C, the low temperature film should be slightly nitrogen rich with low hydrogen content, low etch rate, high dielectric break- down field, index of refraction of about 1.85, and preferably high growth rate. Figure 5 shows a strong correlation between the etch rate in 10:1 buffered HF 18 and the index of refraction n for our 150°C SiN x layers. This dependence is qualitatively 共 but not quan-

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Role of Chromium Intermediate Thin Film on the Growth of Silicon Oxide (SiOx) Nanowires

Role of Chromium Intermediate Thin Film on the Growth of Silicon Oxide (SiOx) Nanowires

products were characterized by Scanning Electron Microscopy (SEM), X-Ray diffraction microscopy (XRD), Energy Dispersive X-ray Spectroscopy (EDX), Transmission Electron Microscope (TEM) and photolumines- cence spectroscopy (PL) for observing the effect of chromium thin film on the structural morphology, crystal structure and composition and optical properties.

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Integration of Functional Oxide Thin Film Heterostructures with Silicon (100) Substrates.

Integration of Functional Oxide Thin Film Heterostructures with Silicon (100) Substrates.

Here we report heteroepitaxial growth of (10 1 2) oriented semipolar (r-plane) ZnO films on Si (100) substrates. The films were grown by pulsed laser deposition and integration of ZnO with silicon was achieved using a tetragonal yttria stabilized zirconia (YSZ) buffer layer. It was observed that ZnO films grown at temperatures in the range of 700-750 o C with relatively high oxygen pressure (~70 mTorr) were (10 1 2) oriented. ZnO films deposited with lower oxygen pressures were found to be purely (0002) orientated. Experiments carried out to elucidate the role of oxygen pressure indicated that the crystallographic orientation of ZnO depends on the nature of atomic termination of YSZ layer. It has been proposed that crystallographic orientation of ZnO is controlled by chemical free energy associated with ZnO-YSZ interface. Detailed x-ray diffraction and transmission electron microscopy studies showed existence of four types of in-plane domains in r-plane ZnO films. Optical characterization demonstrated that photoluminescence of r-plane ZnO films was superior to that of c-plane ZnO films grown under similar conditions.

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Non contact Thin Layer Conductivity Measurement Based on the Conjugate Magnetic Eddy Current Sensor

Non contact Thin Layer Conductivity Measurement Based on the Conjugate Magnetic Eddy Current Sensor

Conjugate magnetic medium eddy current sensor is La and Lb combined with two G14 cylindrical ferrite core coil. The sensor is coaxial installed with 4mm + 0.05 of the distance. It has fixed intensity flux penetration characteristics. The working principle as shown in (Figure 1). The test system uses resonance method. Eddy current sensor La and Lb are series connected end synonym. An adjustable capacitor C is connected to the resonance in parallel with a high frequency sine wave F which forms a conjugate transmission type eddy current magnetic field. According to the parallel resonance phase by IlIC=0, such as (Figure 2 (a)), no sense resistor Vi has the background value of a small loop. When non metal conductive film or semiconductor wafer conjugated in the measured magnetic gap, the eddy current is formed on the conductive material. And it consumes the magnetic energy of the circuit part. It causes inductive reactance resonance loop which detuning the phasor Il+IC ≠ 0 (as in Figure 2 (b))shows). Due to the increase of IR in no sense resistance, the amplitude value, Vi is largely improved. And since U=V part +Vi, VI increases lower vu. At this time u amplitude adjustment maintains the excitation amplitude of the V part load. The improvement of VI and V part can be used to calculate the material sense of the inductive reactance of the vortex inductor L2 and the volume resistivity is calculated according to the thickness of the material.

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Aspects of Silicon Solar Cells: Thin-Film Cells and LPCVD Silicon Nitride

Aspects of Silicon Solar Cells: Thin-Film Cells and LPCVD Silicon Nitride

If an oxide/nitride stack is formed in the early stages of cell processing, then charac- teristics of the nitride may enable increased processing exibility and hence the realisation of novel cell structures. An oxide/nitride stack on silicon also behaves as a good anti- reection coating. The eects of a nitride deposited using low pressure chemical vapour deposition on the underlying wafer are discussed. With a thin oxide layer between the silicon and the silicon nitride, deposition is shown not to signicantly alter eective life- times.

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Adaptive and Reconfigurable Architected Materials Driven by Electrochemistry

Adaptive and Reconfigurable Architected Materials Driven by Electrochemistry

One of the most important motivations for architected materials is to build lightweight structural materials with tailored mechanical properties such as high stiffness, high strength, and high toughness. Significant research efforts have been using additive manufacturing methods to miniaturize the lattice truss structures widely used in construction of buildings and bridges such as octet, kagome and honeycomb lattices [10,14,17–21]. One promising direction is to take advantage of the small-scale size effects to improve mechanical properties. These nanosizing effects have been observed and investigated in nanoscale elements such as thin films (e.g., graphene [22]), nanowires [23] and nanopillars [24], but they are difficult to utilize at larger form factors relevant to practical applications. Architected materials provide a platform to proliferate the superior mechanical properties at small scales to larger structures. Dimensional confinement in solid, hollow or composite beams of architected materials can induce strengthening for nano-crystalline metals [18,19], toughening for brittle materials [10,14], and defect and damage tolerance for metallic glasses and ceramics [9,25,26], which have enabled 3D nanolattices that are ultra-strong, lightweight and mechanically resilient. These fascinating mechanical properties call for systematic and multi-scale modeling frameworks [27,28] that combine classical beam and rigidity theories in structural mechanics and size-dependent phenomena in small-scale mechanics.

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