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Ultra-Low-Power Circuits

II.W IRELESS MONITORING DEVICE

II.W IRELESS MONITORING DEVICE

... target. Low power consumption is essential in continuously monitoring of vital- signs and can be achieved combining very high storage capacity, wireless communication, and ultra-low ...

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Power Management Schemes for Ultra Low Power Biomedical Devices

Power Management Schemes for Ultra Low Power Biomedical Devices

... New bus interfacing techniques and system level architectures in asynchronous techniques may be developed for multiple clock frequency domains to avoid timing conflicts. Further research possibility in level converting ...

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Low Power Modified Feed-Through Logic Circuit for Ultra-low Voltage Arithmetic Circuits

Low Power Modified Feed-Through Logic Circuit for Ultra-low Voltage Arithmetic Circuits

... and low power dissipation for which a new logic family called feedthrough logic (FTL) is proposed in ...[6] circuits like charge sharing, charge leakage and non-inverting logic are completely ...

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Simulation of III-V Material Based Steep Slope Tunnel FET for RF Harvester Application

Simulation of III-V Material Based Steep Slope Tunnel FET for RF Harvester Application

... at ultra-low power ...very low of ...very low value of device OFF current indicates that standby power consumption to be very low when it is used in analog and digital ...

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Design of a Clock Distribution Network using Low Power Prescaler and Fused P & S Counters

Design of a Clock Distribution Network using Low Power Prescaler and Fused P & S Counters

... integrated circuits, the scaling rate of the threshold voltage is comparatively slow compared therewith of the supply ...integrated circuits, motivating the development of low-voltage design ...

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ULTRA LOW POWER LFSR FOR BIST

ULTRA LOW POWER LFSR FOR BIST

... test circuits, eliminating the need to acquire such high end ...integrated circuits to allow them to perform self-testing, ...own circuits, thereby reducing dependence on an external automated test ...

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Ultra Low Power Logic Gates

Ultra Low Power Logic Gates

... very low power ...the power dissipation base on architecture, circuit level, layout, and process ...of power savings can be achieve by means of proper choice of a logic style for implementing ...

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ADIABATIC LOGIC FOR ULTRA LOW POWER APPLICATION

ADIABATIC LOGIC FOR ULTRA LOW POWER APPLICATION

... dissipated power in digital ...growing power needs. Adiabatic circuits significantly reduce the dynamic power dissipation of a circuit, thus reducing the overall power ...digital ...

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An Improved Inverter Based Double-Tail Comparator for Ultra Low-Voltage Circuits

An Improved Inverter Based Double-Tail Comparator for Ultra Low-Voltage Circuits

... lesser power and delay circuits needed high-speed ...lesser power, high speed and low-voltages based on the results of conventional double-tail and proposed double-tail ...

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Novel Fgmos Based Ultra Low Power, High Frequency Half Wave Rectifier

Novel Fgmos Based Ultra Low Power, High Frequency Half Wave Rectifier

... for low level signals. Extensive applications of these circuits include RF demodulators, RMS to DC conversions, linear function generators, AC voltmeters, sample-and-hold circuits, peak detectors and ...

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Design and Analysis of Low Power High Performance 13T SRAM for Ultra Low Power Applications

Design and Analysis of Low Power High Performance 13T SRAM for Ultra Low Power Applications

... leakage power consumption is a great ...leakage power consumption is yet ...of power products. The power gated sleep method shows the least speed power product among all ...the ...

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An Ultra Low Power Voltage Regulator for RFID Application

An Ultra Low Power Voltage Regulator for RFID Application

... input power variations is needed for RFID front-end and digital ...of power consumption and can still perform the task as previously ...sub-microwatts circuits, the regulator uses only MOSFET ...

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Ultra Low Power Consumption Military Communication Systems

Ultra Low Power Consumption Military Communication Systems

... the power dissipation is obtained by reducing the capacitance in the ...use circuits, which heavily utilize transmission gates, and to implement these gates with single n-type transistors (Pass Transistor ...

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Design of Ultra Low Power PMOS and NMOS for Nano Scale VLSI Circuits

Design of Ultra Low Power PMOS and NMOS for Nano Scale VLSI Circuits

... Both the conventional PMOS and NMOS, DT PMOS, DT NMOS and proposed PMOS and proposed NMOS are implemented using 45 nm technology and all are simulated using Cadence Virtuoso Design Environment and simulated and results ...

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Ultra-Low Power Design of Digital CMOS Logic Circuits

Ultra-Low Power Design of Digital CMOS Logic Circuits

... ABSTRACT: Power and area are the two major concerns in design of any digital ...scenario low power device design and its implementation have got a significant role in the field of nano ...at ...

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Ultra Low Power Dissipation in Adiabatic Logic Circuits in DSM Technology

Ultra Low Power Dissipation in Adiabatic Logic Circuits in DSM Technology

... The principle behind adiabatic switching is that, the transitions should be sufficiently slow so that heat is not emitted significantly. This slow transition is achieved when DC power supply is replaced with an AC ...

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Ultra Low Power Designing for CMOS Sequential Circuits

Ultra Low Power Designing for CMOS Sequential Circuits

... for low-power operation. Figure 3 represents the power-delay products of an 8-bit adder relationship between that was implemented in 2 μm CMOS technology with different circuit styles and the ...

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RECENT TRENDS OF POWER DELAY FOR LOW POWER & HIGH SPEED VLSI CIRCUITS

RECENT TRENDS OF POWER DELAY FOR LOW POWER & HIGH SPEED VLSI CIRCUITS

... enhanced low power VLSI circuits, the 1st expression of this condition is by a wide margin the ...standby power utilization is represented by the third ...dynamic power utilization ...

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Power Minimisation Techniques for Testing Low Power VLSI Circuits (PhD Dissertation)

Power Minimisation Techniques for Testing Low Power VLSI Circuits (PhD Dissertation)

... dissipate low power, in order to conserve battery life and meet packaging reliability ...constraints. Low power design in terms of algorithms, architec- tures, and circuits has received ...

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Biquad filter design using VDCC (Earth resistor help in designing of biquad filter using  VDCC)

Biquad filter design using VDCC (Earth resistor help in designing of biquad filter using VDCC)

... and sinusoidal signal of frequencies of 100 KHz, 5 MHz having amplitude of 10mV each is applied at the input of the band pass filter. The frequency spectrum of input and output are also given. It is clear that the 100 ...

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