very high-speed VLSI
A Novel Design of Low Power, High Speed VLSI for Processing Signals Using Multirate Techniques
7
RECENT TRENDS OF POWER DELAY FOR LOW POWER & HIGH SPEED VLSI CIRCUITS
7
DESIGN AND IMPLEMENTATION OF HIGH SPEED VLSI ADDER USING LING EQUATIONS
6
High Speed VLSI Architecture of Wallace Tree Multiplier Utilised in FIR Filter
6
A High Speed Vlsi Architecture For Image Deinterleaver For Compression
7
FUZZY BASED DETECTION AND SWARM BASED AUTHENTICATED ROUTING IN MANET
10
Sensor-less Vector speed Control of Induction motor Drives using MRAS technique.
5
Piggyback Scheme over TCP in Very High Speed Wireless LANs: Review
8
VLSI Implementation of a Fixed Complexity Soft Output MIMO Detector for High Speed Wireless
13
VLSI Architecture for Kogge- stone High Speed Addition Technique using XOR Gate
7
A VLSI implementation of RSD based high speed ECC processor using arithmetic operations
7
VLSI design of high-speed adders for digital signal processing applications.
180
Implementation on STM-16 Frame Termination VLSI with High-Speed and Low-Power GDI Techniques
7
RLC Parameter Extraction and Step Input Response Analysis of Coupled High Speed Distributed VLSI Interconnects
7
High Speed and Energy Efficient Carry Skip Adder Operating Under a Wide Range of Voltage Levels L Priyanka, Mr Devireddy Venkatarami Reddy & Mr T Narasimha Rao
15
Numerical Simulation of Air Flow Properties around High Speed Train in Very Long Tunnel
8
VLSI Design and Implementation of High Speed and High Throughput DADDA Multiplier U V N S Suhitha & Mr G Ravikanth
7
VLSI Implementation of 4 bit 50Gbps High Speed Pipelined ADC Architecture for I UWB Receiver
6
HIGH SPEED AND LOWER HARDWARE COMPLEXITY VLSI ARCHITECTURE FOR LIFTING BASED DISCRETE WAVELET TRANSFORM
7
LOW-POWER HIGH-SPEED CIRCUIT DESIGN FOR VLSI MEMORY SYSTEMS
11