Statistical tests are designed to measure the quality of a generator. While it is impossible to give a mathematical proof that a generator is indeed a random bit generator, the tests help detect certain kinds of weaknesses the generator may have. This is accomplished by taking a sample output sequence of the generator and subjecting it to various statistical tests. Each statistical test determines whether the sequence possesses a certain attribute that a truly random sequence would be likely to exhibit; the conclusion of each test is not definite, but rather probabilistic. An example of such an attribute is that the sequence should have roughly the same number of 0‘s as 1‘s. If the sequence is deemed to have failed any one of the statistical tests, the generator may be rejected as being non-random; alternatively, the generator may be subjected to further testing. On the other hand, if the sequence passes all of the statistical tests, the generator is accepted as being random. More precisely, the term ―accepted‖ should be replaced by ―not rejected‖, since passing the tests merely provides probabilistic evidence that the generator produces sequences which have certain characteristics of random sequences. There are 5 basic statistical tests .
Abstract— Biometric is the measurement of behavioral and physiological characteristics for the human, generally used either for identification or verification, but it is also can be used as a key for different security applications. Among different biometric characteristics such as ears, voice, fingerprint, face, retina, iris, palm print, hand geometry, etc., the retina biometric can provide a higher level of security because of its inherent robustness. The main aim of this paper is to design and build a pseudorandom numbergeneratorbased on the retina for stream cipher cryptography. The proposed system is based on the use of hybrid technology that consists of the characteristics of human retina and logistic functions to generate keys with high-quality specifications in terms of unpredictability, randomization, and non-re-generation. The NIST Package and correlation statistical tests prove that the generated keys are random, unpredictable, uncorrelated, and robust against different kinds of attack. The retina image keys are capable of passing most of the NIST statistical tests with high success rates also the average security test prove that the encrypted text is secure against entropy attack. Keywords— Retina, Randomnumbergenerator, Logistic function, Linear interpolation
The central mathematical concept in true RNG is entropy, which is the assessment standard of the security and quality of a RNG. There are many types of entropy. In recent years, min-entropy, a very conservative evaluation, is applied to lower bound the entropy content in quantum RNG and as the indicator for extraction ratio of universal hash extractor. In our work, and some ever works [15, 19], quantum conditional min-entropy are deduced to impose stricter removal of side signal. Min-entropy is estimated by using the most common value estimate. However, the most common value estimate is more appropriate for IID (independent identically distribution). For non-IID distribution, the estimate may provide an overestimation. The NIST Special Publication 800-90 series of Recommendations provides guidance on the construction and validation of random bit generators (RBGs) in the form of deterministic random bit generators, in which pseudorandom bits are generated by using an unknown seed, or in the form of non-deterministic random bit generators that can be used for cryptographic applications. Entropy source validation is necessary in order to obtain assurance that all relevant requirements of this Recommendation are met.
Coding theory is one of the most important and direct applications of information theory. Using a statistical description for data, information theory quantifies the number of bits needed to describe the data, which is the information entropy of the source. Information theoretic concepts apply to cryptography and cryptanalysis. Cryptography is the study of sending and receiving secret messages. With the widespread use of information technologies and the rise of digital computer networks in many areas of the world, securing the exchange of information has become a crucial task. In the present paper an innovative technique for data encryption is proposed based on the random sequence generation. The new algorithm provides data encryption at two levels and hence security against crypto analysis is achieved at relatively low computational overhead.
Playfair cipher is the well-known multiple letter encryption cipher. Here the digraphs in the plaintext are treated as single units and converted into corresponding cipher text digraphs. However because of the drawbacks inherent in the 5 X 5 Playfair cipher which adversely affects the security we proposed a 6 X 6 Playfair cipher and then coupled it with Linear Feedback Shift Register based Unique RandomNumberGenerator . 6 X 6 Playfair cipher supports all 26 alphabets (A-Z) and 10 digits (0- 9) which eliminate the limitation of 5 X 5 Playfair in which “i” and “j” both character could not appear at the same time [2, 3]. LFSR not only enhances the security up to a considerable level by generating random sequences but also provides a much faster rate of encryption and decryption , that’s why LFSR based Unique RandomNumberGenerator is chosen for the consideration. This paper deals in with the security issues of the new proposed system. Various types of cryptography attacks have been taken under consideration for original Playfair cipher but not vulnerable for this proposed cipher.
Diehard test, the statistic complexity test and the Hurst exponent test are used to provide a measure of the quality of the randomness of the proposed pseudorandom numbergenerator. David B. Thomas, Wayne Luk,  presented ―The LUT-SR Family of Uniform RandomNumber Generators for FPGA Architectures ‖ . A type of FPGA RNG called a LUT-SR RNG, which takes advantage of bitwise XOR operations and the ability to turn lookup tables (LUTs) into shift registers of varying lengths. This provides a good resource–quality balance compared to previous FPGA-optimized generators, between the previous high-resource high-period LUT-FIFO RNGs and low-resource low-quality LUTOPT RNGs, with quality comparable to the best software generators. The LUT-SR generators can also be expressed using a simple C++ algorithm contained within this paper, allowing 60 fully-specified LUT-SR RNGs with different characteristics to be embedded in this paper, backed up by an online set of very high speed integrated circuit hardware description language (VHDL) generators and test benches. Ravi Saini, Sanjay Singh, Anil K Saini, A S Mandal, Chandra Shekhar  presented ―Design of a Fast and Efficient Hardware Implementation of a RandomNumberGenerator in FPGA ‖ presents a fast and efficient hardware implementation of a pseudo-randomnumbergeneratorbased on Lehmer linear congruential method. Demonstrated in this paper that how the introduction of application specificity in the architecture can deliver huge performance in terms of area and speed. The design has been specified in VHDL and is implemented on Xilinx FPGA device XC5VFX130T- 3ff1738 and takes up only 23 slice LUTS. In 2014, Purushottam Y. Chawle and R.V. Kshirsagar  , presented a simple algorithm to generate pseudo randomnumber using Linear Feedback Shift register(LFSR).The generated pseudo sequence is mainly used for communication process such as cryptographic, encoder and decoder application in coded format.
2) Distinguishing Attacks: Any output of a stream cipher (or PRNG) designed for cryptographic appli- cations, should not be statistically distinguished from a truly random sequence. In fact, distinguishing attacks de- scribed in reference , try to find traces of the dist- inguishing property by exploiting the weaknesses of the algorithm related to the linear and no ear com- binations. Here, the generated sequences pass success- fully the standard statistical tests for randomness. More- over, the only linear masking occurs when we applied
Bull Mountain Technology) to generate random numbers. If supported, this is a high bandwidth, cryptographically secure hardware randomnumber genera- tor as shown in Figure 2.3 taken from . In order to provide the security of randomnumber generators, it should be resistive to the attacks. From this per- spective, Intel RNG crypto and classifier blocks can always be built to thwart timing and power analysis attacks . Furthermore, Intel RNG is also resis- tive against power glitching attacks; i.e. RNG turns itself off when voltage or temperature goes out of spec, re-initializes itself when power and voltage return to spec . Beside the attack protection, Intel RNG uses built-in self-tests to evaluate whether the blocks implementing the RNG are operating correctly . Additionally, this hardware-basedrandomnumbergenerator is used in add timer randomness to set cycles to any random value instead of getting its value from CPU. Recall that jiffies are still taken from CPU, because that value is used in entropy estimation process.
We have presented a novel quasigroups based low overhead pseudo randomnumbergenerator. The algorithm requires the storage of bits, where n is the order of the quasigroup. The algorithm is computationally efficient, as it requires matrix lookup operations and limited number of writes to memory. The quality of random numbers produced by the proposed algorithm is compared against other well- known PRNGs and the results show that the proposed algorithm outperforms any given PRNG in majority of the tests. We also presented the results of using the stream of random numbers generated to encrypt audio data.
Abstract—We focus on text based watermarking techniques based on Pseudo-RandomNumberGenerator(PRNG) for Cryptography application. We survey related workin digital watermarking, cryptography and design methodology, then develop our own text based watermarking method (embedded and extract/detection of watermarks). Our implementation result have shown that better accuracy of extracted watermark and PRNG random bit sequence made its strengthen the security of protecting data. Our RSA Key generator therefore holds potential for future implementations of PRNG in practical parallel applications such as parallel grid computing, parallel genetic programming, parallel cryptography, and parallel computation analysis. This paper is intended to provide a reference finding for newcomer's security designer and to promote more activities in these security issues.
development of the country. The dramatic increase in population causes the requirement of industries to meet out their basic needs. This increase in industrial civilization causes demand for power to function. For this we need large amount of power generation from different kinds of sources but conventional sources are causing unbalance in the environment by pollution and global warming. To overcome the power demand and production of power in eco-friendly manner, speed breakers are the most efficient sources for the power generation. Since the vehicles count increasing day by day, a large number of vehicles stand in queue at the tollbooth. So, we can utilize the potential energy of vehicles by using speed breakers at regular interval in tollbooth.
A new, patent pending, architecture for an integrated random bit source has been presented which is low demanding in terms of area and power consumption and suitable for security applications. The proposed generator is an enhance- ment of the oscillator-based architecture but, at the same time, it presents the advantages of a direct amplification-based RBG, thus resulting in a reliable and robust solution for high quality random bit generation. The source also features a tuning and a real-time test of its statistical quality. A standard-cell based imple- mentation, without any amplified noise source, can be adopted for the proposed generator and implementation details have been also discussed.
CASE 4: Considering the worst case if intruder knows the key length and is able to calculate the LFSR sequence but still not knowing the number of bits of LFSR sequence used to select G-matrix. Fig.4 shows SNR vs BER graph for the various signals.
In cryptography there are so many encryption systems are there. They are substitutions ciphers, transposition ciphers, mono alphabetic ciphers, poly alphabetic ciphers, modular mathematics and one-time pad etc. Whatever the method of cryptography the main issue is Key. Based on the Kickoffs’s principle, the security of cryptographic system depends on key only. It doesn’t matter how well and how strong the cryptographic system is designed. If the key is week or small the intruders can easily crack the information. many chaotic secure communication schemes explain what the key is, how it should be chosen, and what the available key space is. So, we can’t say a cryptographic system is protected without key.
Unlike in case of distinguishing attacks, array-based stream ciphers usually show high resistance to key (or internal state) recovery attacks. For some time the fastest state recovery algorithm for RC4 was by Mister and Tavares . At CRYPTO 2008  Maximov proposed an improved attack against RC4 requiring about 2 241 operations. One difficulty in mounting these attacks against this family of ciphers is the fact that many secret words of the internal state are used to produce a single word of output. In RC4 3 words of the internal permutation are used per one output word. VMPC-R uses 11 words of its permutations to produce one output (4 elements of P and 7 of S). We roughly estimate that the total number of possible values of the unique elements of P and S used to produce 50 VMPC-R outputs would be greater than the total keyspace of a 2048-bit (256-byte) secret key. We don’t expect the key/state recovery attacks to be a significant threat to the security of the proposed cipher.
period (the addition in the suffix is considered modulo P). We divide equally each [0,1] axis into 2 v pieces (in other words, consider only the most significant v bits). Thus, we have partitioned the unit cube into 2 kv small cubes. The sequence is k-distributed to v-bit accuracy if each cube contains the same number of points (except for the cube at the origin which contains one less). Consequently, the higher k(v) for each v assures higher-dimen- sional equidistribution with v-bit precision. By k-distribution test, we mean to obtain the values k(v). This test fits the generators based on a linear recursion over the two-element field F 2 (we call these generators F 2 -
Chaos generator is a fundamental block of any chaos based system. Basically chaos based system are used in secure communication and cryptography. Recently implementation of FPGA based real time chaoticoscillator using different numerical algorithm were presented and it was shown that the processing speed of FPGA is much higher due to parallel processing capabilities. Hence it may be interesting to see the performance of FPGA based different chaotic systems as the analog based design of chaos based generators is sensitive to initial conditions and acquires a large chip area. To avoid these problems Digital based design chaotic systems using FPGA can be implemented as FPGA implementation is more flexible architecture and have low cost test cycle and found more useful in chaos based engineering applications [1-7].
Graphics processors represent a promising technology for accelerating computational science applica- tions. Many computational science applications require fast and scalable randomnumber generation with good statistical properties, so they use the Scalable Parallel RandomNumber Generators library (SPRNG). We present the GPU Accelerated SPRNG library (GASPRNG) to accelerate SPRNG in GPU-based high per- formance computing systems. GASPRNG includes code for a host CPU and CUDA code for execution on NVIDIA graphics processing units (GPUs) along with a programming interface to support various usage models for pseudorandom numbers and computational science applications executing on the CPU, GPU, or both. This paper describes the implementation approach used to produce high performance and also describes how to use the programming interface. The programming interface allows a user to be able to use GASPRNG the same way as SPRNG on traditional serial or parallel computers as well as to develop tightly coupled programs executing primarily on the GPU. We also describe how to install GASPRNG and use it. To help illustrate linking with GASPRNG, various demonstration codes are included for the different usage models. GASPRNG on a single GPU shows up to 280x speedup over SPRNG on a single CPU core and is able to scale for larger systems in the same manner as SPRNG. Because GASPRNG generates identical streams of pseudorandom numbers as SPRNG, users can be confident about the quality of GASPRNG for scalable computational science applications.
It is noteworthy that these families of very weakly coupled maps are more powerful than the usual formulas used to generate pseudo-random sequences, mainly because only additions and multiplications are used in the computation process, no division being required. Moreover the computations are done using floating point or double precision numbers, allowing the use of the powerful Floating Point Unit (FPU) of the modern microprocessors. In addition, a large part of the computations can be parallelized taking advantage of the multicore microprocessors which are used nowadays. Moreover, a determining property of such coupled map is the high number of parameters used ( p × − ( p 1) for p coupled equations) which allows to choose them as cipher-keys, when used in chaos based cryptographic algorithms, due to the high sensitivity to the parameters values .
noteworthy fashioner control over the clock waveforms, and their use takes out the requirement for starting alignment. Tunability is set up by setting the DCM parameters on– the– fly utilizing DPR capacities utilizing DRP ports. This capacity gives the outline more noteworthy adaptability than the ring oscillatorbased BFD-TRNG. The distinction in the frequencies of the two created clock signals is caught utilizing a DFF.