Top PDF Efficient Implementations of Pairing-Based Cryptography on Embedded Systems

Efficient Implementations of Pairing-Based Cryptography on Embedded Systems

Efficient Implementations of Pairing-Based Cryptography on Embedded Systems

Cryptography is a key technology for achieving information security in computer systems, electronic commerce, and in the emerging information security systems. Elliptic curve cryp- tography [1] are advantageous among public key cryptosystems for its faster key generation, shorter key size for same security level compared to RSA and low on CPU and memory con- sumption. The discrete logarithm Problem (DLP) is intractable for some group of points on elliptic curve defined over a finite field. Intractability of Diffie-Hellman problem (DHP) [2] is the basis of Diffie-Hellman key agreement protocol which allow two parties (Alice and bob) to establish a shared secret key by communicating over a public channel that is being moni- tored by eavesdropper (Eve). This protocol is efficient to share key among two parties in one round but if we have three parties to share the key over a public channel Diffie-Hellman key agreement protocol takes two step. Antoine Joux [3] devised a simple protocol to share the key between three parties in one round using pairings. Three party key exchange protocol using pairing is shown in in Figure 1.1. Alice, Bob and Chris have private keys as a,b,c and calculate aP, bP and cP using scalar multiplication over elliptic curve and share these values over public channel.
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Efficient  Pairings   and  ECC  for  Embedded  Systems

Efficient Pairings and ECC for Embedded Systems

Abstract. The research on pairing-based cryptography brought forth a wide range of protocols interesting for future embedded applications. One significant obstacle for the widespread deployment of pairing-based cryptography are its tremendous hardware and software requirements. In this paper we present three side-channel protected hardware/software designs for pairing-based cryptography yet small and practically fast: our plain ARM Cortex-M0+-based design computes a pairing in less than one second. The utilization of a multiply-accumulate instruction- set extension or a light-weight drop-in hardware accelerator that is placed between CPU and data memory improves runtime up to six times. With a 10.1 kGE large drop-in module and a 49 kGE large platform, our design is one of the smallest pairing designs available. Its very practical runtime of 162 ms for one pairing on a 254-bit BN curve and its reusability for other elliptic-curve based crypto systems offer a great solution for every microprocessor-based embedded application.
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A  survey  of  Fault  Attacks  in  Pairing  Based  Cryptography

A survey of Fault Attacks in Pairing Based Cryptography

In 1984, A. Shamir challenged the cryptography community to find a protocol based on the user identity [40]. This challenge was solved nearly twenty years later by D. Boneh and M. Franklin. In 2003, D. Boneh and M. Franklin created an identity-based encryption (IBE) scheme based on pairings [10]. The general scheme of an identity based encryption is described in [10] and several protocols based on pairings have been developed since [28]. A feature of Identity Based protocols is that a computation of a pairing involving the private key and the ciphertext is performed in order to decipher a message. A pairing is a bilinear map e taking as inputs two points P and Q of an elliptic curve. The pairing computation gives the result e(P, Q). Several pairings have been described in the literature. The Weil and the Tate pairing were developed [42] without any considerations for the efficiency of the computation. Once pairings were used to construct protocols, cryptographers sought more efficient algorithms. In chronological order, the Duursma and Lee algorithm [15], the Eta [6], Ate, twisted Ate [25], optimal pairings [44] and pairing lattices [24] were discovered. Re- cently, a construction of pairing over a general abelian variety was proposed in [33]. The latest implementations results [2, 5, 11, 22, 38] of pairing computations are fast enough to consider the use of pairing based protocols in embedded devices. Consequently, it seems fair to wonder if pairing based protocols involving a secret are secure against physical attacks in general and fault attacks in particular. Side channel attacks have been analysed in [47] where they conclude that an efficient countermeasure would be to set the secret as the first parameter. In [30], Kim et al. analyse the effect of side channel attacks against pairings over binary fields. According to the recent work of Joux [27], pairings over binary fields are not secure. We focus here on fault attacks against pairings in fields with a large prime characteristic.
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Random-based networks with dropout for embedded systems

Random-based networks with dropout for embedded systems

Random-based learning paradigms exhibit efficient training algorithms and remarkable generalization performances. However, the computational cost of the training procedure scales with the cube of the number of hidden neurons. The paper presents a novel training procedure for random-based neural networks, which combines ensemble techniques and dropout regularization. This limits the computational complexity of the training phase without affecting classification performance significantly; the method best fits Internet of Things (IoT) applications. In the training algorithm, one first generates a pool of random neurons; then, an ensemble of independent sub-networks (each including a fraction of the original pool) is trained; finally, the sub-networks are integrated into one classifier. The experimental validation compared the proposed approach with state-of-the-art solutions, by taking into account both generalization performance and computational complexity. To verify the effectiveness in IoT applications, the training procedures were deployed on a pair of com- mercially available embedded devices. The results showed that the proposed approach overall improved accuracy, with a minor degradation in performance in a few cases. When considering embedded implementations as compared with conventional architectures, the speedup of the proposed method scored up to 209 in IoT devices.
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Pairing Free Two Party Authenticated Protocols for Cryptography

Pairing Free Two Party Authenticated Protocols for Cryptography

ABSTRACT : In client-server environment, the protection against unauthorized access to resources resided in remote server becomes very essential and a number of authenticated remote login systems have also been discussed and analyzed. In the present research work, Pairing Free Self Certified techniques/protocols for secure operations such as authenticated key agreement protocol for message confidentiality, digital signature schemes for message integrity/authentication and remote login systems applicable in client-server paradigm is developed. The proposed work mainly focuses on the development of two authenticated key agreement protocols and they are pairing-free self- certified public key cryptography (PF-SC-PKC)-based two party authenticated key agreement protocol and pairing-free identity-based authenticated group key agreement protocol. These protocols are efficient and useful for practical applications. The technical evaluation of the PF-SC-PKC is proved mathematically. PF-SC-PKC is an enhanced high degree of cryptographic security technique for Information and Network Security, which will enhance the security in Network to a very great extent.
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Energy Efficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems

Energy Efficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems

The presented work makes the following contributions: a) It is shown how iterative improvement mapping and schedul- ing algorithms can be effectively adapted to optimise system implementations towards an efficient utilisation of the DVS- PEs while meeting, at the same time, hard deadlines. This is done using a new two-step approach for scheduling and map- ping based on genetic algorithms (GAs). b) The outlined sched- ule optimisation is based on a DVS algorithm, which takes into account the PE power profiles, hence, leading to further energy savings. c) To illustrate the efficiency of the proposed approach, a comparative study is presented, comparing our results with two recently published synthesis approaches [11, 18], which are based on constructive list scheduling heuristics and neglect the PE power profiles. This further includes a quantitative com- parison between a variable-voltage system and a multi-voltage system, which demonstrates the efficiency of the proposed tech- nique also for multi-voltage processors.
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Effective Implementations of GF (p) Elliptic Curve Cryptography Computations Using Parallelism

Effective Implementations of GF (p) Elliptic Curve Cryptography Computations Using Parallelism

ECC was first proposed in 1985 by N. Koblitz and V. Miller . Since then, a considerable amount of research has been performed on secure and efficient ECC implementations. One of the most important advantages of ECC over conventional public-key schemes is that much smaller key sizes are required to achieve the same security level . As an example 160 bits ECC is equivalent to 1024 bits RSA . Smaller key sizes make ECC suitable for embedded systems and wireless applications, which require combining performance with low-power hardware and smaller security certificates. Several ECC implementations have been reported in the literature at the software level and hardware level as well []. The performance of an ECC cryptosystem is mostly determined by an efficient implementation of its arithmetic over a Galois Field GF( p ) or GF( 2 m ) . ECC arithmetic is applied on points located on selected elliptic curves and includes point-addition, point-doubling and point-multiplication. When elliptic curve (EC) points are expressed in affine coordinates, ECC arithmetic includes multiplications and divisions (inversions), which are highly time-consuming.
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Software Implementations of Elliptic Curve Cryptography

Software Implementations of Elliptic Curve Cryptography

Elliptic Curve Cryptography (ECC) is a promising alternative for public-key algorithms in resource-constrained systems because it provides a similar level of security with much shorter keys than conventional integer-based public-key algorithms. ECC over binary field is of special interest because the operations in binary field are thought more space and time efficient. However, the software implementations of ECC over binary field are still slow, especially on low-end processors used in small computing devices such as sensor nodes. In this paper, we studied software implementations of ECC. We first investigated whether some architectural parameters such as word size may affect the choice of algorithms when implementing ECC with software. We identified a set of algorithms for ECC implementation for low-end processors. We also examined several improvements to the instruction set architecture of an 8-bit processor and studied their impact on the performance of ECC.
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Authenticated Privacy Preserving Pairing Based Scheme for Remote Health Monitoring Systems

Authenticated Privacy Preserving Pairing Based Scheme for Remote Health Monitoring Systems

The digitization of patient health information has brought many benefits and challenges for both the patients and physicians. However, security and privacy preservation have remained important challenges for remote health monitor- ing systems. Since a patient’s health information is sensitive and the commu- nication channel (i.e. the Internet) is insecure, it is important to protect them against unauthorized entities. Otherwise, failure to do so will not only lead to compromise of a patient’s privacy, but will also put his/her life at risk. How to provide for confidentiality, patient anonymity and un-traceability, access con- trol to a patient’s health information and even key exchange between a patient and her physician are critical issues that need to be addressed if a wider adop- tion of remote health monitoring systems is to be realized. This paper pro- poses an authenticated privacy preserving pairing-based scheme for remote health monitoring systems. The scheme is based on the concepts of bilinear paring, identity-based cryptography and non-interactive identity-based key agreement protocol. The scheme also incorporates an efficient batch signature verification scheme to reduce computation cost during multiple simultaneous signature verifications.
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Smaller  Keys  for  Code-Based  Cryptography:  QC-MDPC  McEliece  Implementations  on  Embedded  Devices

Smaller Keys for Code-Based Cryptography: QC-MDPC McEliece Implementations on Embedded Devices

In this work we presented implementations for the McEliece cryptosystem over QC-MDPC codes for Xilinx Virtex-6 FPGAs and AVR microcontrollers. Our implementations were primarily designed for high through- put and low memory consumption. Since decoding is generally the most expensive operation in code-based cryptography, we analyzed existing decoders and proposed several optimized decoders. We evaluated all decoders and selected the most suitable ones for the corresponding platforms. In addition, we showed that it is indeed possible to realize alternative public-key cryptosystems with moderate key size requirements and high performance or low memory on embedded systems. By demonstrating the excellent properties of this novel construction for embedded applications, we hope to have provided another incentive for further cryptanalytical investigation of QC-MDPC codes in the context of code-based cryptography.
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Rate-Based Resource Allocation Models for Embedded Systems *

Rate-Based Resource Allocation Models for Embedded Systems *

To test this conjecture two hybrid rate-based FreeBSD systems were constructed. For application and system call level processing EEVDF scheduling was used. This choice was made because the quantum nature of EEVDF, while bad for intra-kernel resource allocation, is a good fit given the existing round-robin scheduling architecture in FreeBSD (and many other operating systems such as Linux). It is easy to implement and to precisely control and gives good real-time response when schedulable entities execute for long periods relative to the size of a quantum. For device and protocol processing inside the kernel both CBS and RBE scheduling were considered. Since the lower kernel layers operate more as an event driven system, a paradigm which takes into account the notion of event arrivals is appropriate. Both of these policies are also well-suited for resource allocation within the kernel because, in the case of CBS, it is easier to control the levels and degrees of preemption within the kernel and hence it is easier to account for CPU usage within the kernel (and hence easier to realize the results predicted by the CBS theory). In the case of RBE, processing within the kernel is more deterministic and hence RBE’s inherent inability to provide isolation between tasks that require more computation than they reserved is less of a factor.
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Reconfigurable Component based Middleware for Networked Embedded Systems

Reconfigurable Component based Middleware for Networked Embedded Systems

The benefits of CFs are various. Firstly, they provide intermediate abstractions between compo- nents and whole systems, thus acting as a scoping mechanism. Therefore, they generally increase understandability and maintainability of systems. Secondly, they simplify component develop- ment and assembly through design reuse and guidance to developers. Finally, they enable the use of lightweight components (plug-ins), as these can assume shared CF-specific state and services. For example, a plug-in component providing reliability on top of a routing mechanism might as- sume that, in the CF it is meant to be plugged into, there will be at least a component implementing a “routing” interface and a component implementing a “MAC” interface, and that those services will be available through known interfaces.
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PAPR reduction scheme with efficient embedded signaling in MIMO OFDM systems

PAPR reduction scheme with efficient embedded signaling in MIMO OFDM systems

interesting solutions are proposed in the literature such as cross-antenna rotation and inversion [9], direct SLM [10], direct PTS (dPTS) [11], unitary rotation [12], opti- mal PAPR reduction [13], and polyphase interleaving and inversion [14]. These techniques consist of selecting the transmitted sequence with the lowest average PAPR over all transmit antennas. However, all these methods decrease the SI but imply an explicit SI transmission to recover the useful data at the receiver side. As such, these approaches cause a resource wasting (in terms of channel bandwidth) that can considerably decrease the data rate. Moreover, a wrong estimation of the SI at the received side could damage the total signal recovery which leads to significant performance deterioration in terms of bit error rate (BER). Thus, several recent research works, known as blind techniques [15–17], have been proposed to avoid the sending of the explicit SI. Some of these studies required the use of a special phase rotations of candidate signals (0 or π ) [15], which degrade the PAPR performance. The other proposed approaches are only relevant for two antennas [16] or are too complex to be implemented [17]. This paper focus on avoiding the transmission of the explicit SI in MIMO-OFDM systems. To achieve this goal, we propose two efficient blind methods. In the first part, we propose a new blind technique, one inspired from classical SLM techniques, referred to as Blind Space Time Bloc Codes (BSTBC). This method requires, at the transmitter side, a special precoder codebook containing different configurations of two Space Time Bloc Codes (STBC) patterns. Among them, the one leading to the minimum PAPR will be kept in the PAPR reduction pro- cess. Consequently, this leads to an embedded signaling that guarantees a reliable and perfect signal recovery at the receiver side through a hard or a soft decision process. The second method consists of combining the BSTBC method with BSLM scheme already investigated in [18]. This combined method, referred to as Blind SLM-STBC (BSLM-STBC), exploits two forms of signaling which are the set of rotated and unrotated constellations and a precoders codebook containing different configura- tions of STBC patterns. In this paper, we show that BSLM-STBC approach does not only lead to significant reduce of the PAPR level but also enhances the recovery process at the receiver side. Furthermore, both methods consider a MAX-Log-MAP estimation technique which takes an optimal advantage from these embedded sig- naling. Compared to the existing works, our proposed methods have the advantage to consider an embedded signaling process that exploits both the transmitter and the receiver sides to jointly reduce the PAPR and guar- antee a perfect signal reconstitution without use of an explicit SI.
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Energy Efficient Semi-Partitioned Scheduling for Embedded Multiprocessor Streaming Systems

Energy Efficient Semi-Partitioned Scheduling for Embedded Multiprocessor Streaming Systems

In this section we evaluate the effectiveness of our semi-partitioned approach in terms of energy savings. We compare our results with the heuristic-based partitioned approach which guarantees the most balanced distribution of utilization of tasks among the available proces- sors, and therefore the least energy consumption, as shown in [3]. The authors in [3] also show that the most balanced distributions are derived when worst fit decreasing (WFD) heuristic is used to determine the assignment of tasks to processors. Each processor then schedules the tasks assigned to it using a local EDF scheduler. In the rest of this section, we will refer to this partitioned approach with the acronym PAR. Note that under PAR all tasks meet their dead- lines. By contrast, our proposed semi-partitioned approach will be denoted in the rest of this section with SP when fixed processor speed is used, and with PWM when the periodic speed switching scheme is adopted. Note that although under our approach tasks may experience tardiness, this has no effect on the guaranteed throughput, which remains constant among all the considered approaches (PAR, SP, PWM). However, task tardiness has an impact on buffer sizes and start times of tasks (and, in turn, on the latency of applications), as described in Sect. 4. Note that although the PAR approach provides HRT guarantees to all tasks in the system, whereas both SP and PWM only provide SRT guarantees, our comparison remains fair. This is because:
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Embedded Systems based Smart Parking System

Embedded Systems based Smart Parking System

In today parking lots there are no standard system to check for parking spaces. The system heavily relies on human interaction with the physical space and entity. This leads to wastage of human manpower and also parking spaces at times. These parking lots are dependent on Human-to-Human Interaction (HHI) which is not efficient. Previously, various techniques have been proposed to overcome such problems like Short Messaging Services, Zigbee, RFID, etc.

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An Efficient Certificate-Based Authenticated Key Agreement Protocol without Bilinear Pairing

An Efficient Certificate-Based Authenticated Key Agreement Protocol without Bilinear Pairing

tion computational Diffie-Hellman assumption, the proposed protocol is proven secure in the random oracle model. Without costly bilinear pairing oper- ations, the proposed CB-AKA protocol significantly decreases the computation cost. Compared with the previous pairing-based CB-AKA protocols [24, 33, 35, 45], it enjoys obvious advantage in the computational efficiency and is more suitable for the power-con- strained and computation-limited devices.

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Efficient and Secure Data Sharing Using Attribute-based Cryptography

Efficient and Secure Data Sharing Using Attribute-based Cryptography

With the ever-growing production of data coming from multiple, scattered, and highly dynamical sources, many providers are motivated to upload their data to the cloud servers and share them with other persons for different purposes. However, storing data on untrusted cloud servers imposes serious concerns in terms of security, privacy, data confidentiality, and access con- trol. In order to prevent privacy and security breaches, it is vital that data is encrypted first before it is outsourced to the cloud. However, designing ac- cess control models that enable different users to have various access rights to the shared data is the main challenge. To tackle this issue, a possible solution is to employ a cryptographic-based data access control mechanism such as attribute-based encryption (ABE ) scheme, which enables a data owner to take full control over data access. However, access control mech- anisms based on ABE raise two challenges: (i) weak privacy: they do not conceal the attributes associated with the ciphertexts, and therefore they do not satisfy attribute-hiding security, and (ii) inefficiency: they do not support efficient access policy change when data is required to be shared among multiple users with different access policies. To address these issues, this thesis studies and enhances inner-product encryption (IPE ), a type of public-key cryptosystem, which supports the attribute-hiding property as well as the flexible fine-grained access control based payload-hiding prop- erty, and combines it with an advanced cryptographic technique known as proxy re-encryption (PRE ).
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Efficient Access Control for Security of Cloud Storage Systems Using RNS Cryptography

Efficient Access Control for Security of Cloud Storage Systems Using RNS Cryptography

Developing highlights of the distributed storage administrations empowers information proprietors to store their huge information in the cloud and give the information access to the clients. As protection and security of the cloud server isn't guaranteed, an Attribute-Based Encryption (ABE) a promising strategy for information get to control in distributed storage is used in this undertaking. Trait based encryption, particularly for cipher text arrangement quality based encryption, can satisfy the usefulness of fine-grained get to control in distributed storage frameworks. In the proposed conspire, any client can recuperate the outsourced information if and just if this client holds adequate trait mystery keys as for the entrance strategy and approval enter as to the outsourced information. Both the extent of cipher text and the quantity of matching tasks in decoding are consistent, which diminish the communication overhead and algorithm cost of the framework. Residue Number Systems (RNS) are valuable for dispersing vast dynamic range algorithms over little measured rings, which permits the accelerate of algorithms. RNS algorithm will be utilized for the encryption and unscrambling process included, which can be utilized to accomplish performance change as the number-crunching includes littler numbers and should be possible in parallel. This guarantees the framework is quick, most solid and is executed with the minimum computational expenses.
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Efficient Embedded Microprocessor

Efficient Embedded Microprocessor

In this research paper we are trying to introduce an embedded microprocessor which is combination of embedded system and microprocessor. These embedded microprocessors are 8 bit devices programmed in assembly language. These processors are used as microcontrollers in devices such as automative ignition control, digital radio tuning, printers, mobile phones, DVD players and washing machines. In these processor RISC microcontrollers such as ARM used as they are cheap and consume low power. These devices are cheap, easy to design software portable, high noise immunity, high speed, no component ageing and drift which makes them more useful than ordinary processors. In these devices we are replacing analog circuits with digital circuits.
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Energy Efficient One Bit Subtractor Circuits for Computing Applications in Embedded Systems

Energy Efficient One Bit Subtractor Circuits for Computing Applications in Embedded Systems

domain, static or leakage power consumption becomes an important parameter in today’s VLSI design. In this paper, area-power-energy efficient 10 transistor 1-bit full subtractor has been proposed and compared with 20T and 14T one bit full subtractor circuits. The simulations for all the circuits were performed by using Microwind 3.1 CAD tool. Various parameters such as area, delay, power consumption PDP and EDP have been determined from Subtractor layout of feature size 45nm technology. The proposed 10 transistors full subtractor is energy efficient compared to other counterpart. Key Words: Leakage power, Full subtractor, CAD tool.
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