[PDF] Top 20 WRL 2000 3 pdf

... ROCK ’N’ SCROLL IS HERE TO STAY a floor and gesture to change floors, set the device’s neutral orientation, or disable or enable scrolling.. Fifteen members of Compaq’s Palo Alto researc[r] ... See full document

... The second technique involves splitting the comparator on the tag path into two smaller comparators. Each com- parator handles one half of the address bits to be compared. This reduces the capacitative load on the ... See full document

... protocols from changes in network technology, because they allow universal communication without the expense of constructing a homogeneous universal infrastructure, and because they allow the use of different network ... See full document

... First, the rule for determining if values are equivalent, and therefore candidates for common subexpression elimination (CSE) is very simple, yet works for all operations. A general rule in the Swift IR is that values ... See full document

... Java, and similar programming environments, are essen- tial enablers of mobile computing owing to their platform neutrality and exibility. In the future, the personal (and mobile) computers that people will likely always ... See full document

... Grr uses a method developed by J. Prisner and R. Kao of WRL to solve this problem. This method effectively pushes the problem of ECL/TTL separation back to the designer. Each signal layer can be tesselated into ... See full document

... Many of the modern garbage collectors [10] recover space by copying accessible objects into some "new space". Two of the attractive properties of a copying collector are that it results in memory compaction and ... See full document

... The speed of this adder is comparable to the speed achievable with more complex implementations. The reason why this adder is so fast, although its total delay is 8 gate delays + the delay of the last xor operation, ... See full document

... = 3, for example, there is a high probability that one host will continually defer to the other two for several collision resolution cycles, and the measured standard deviation be- comes a sizeable fraction of the ... See full document

... The source host requests a visa from that ACS, which if necessary obtains visas from ACSs in other organizations, distributes visa information to the appropriate gateways, and returns th[r] ... See full document

... Since C appears to be a satisfactory UNCOL, our attention can now turn to the problems of compiling Scheme to it. In the sections which follow, it is assumed that the reader has some familiarity with C. The Scheme ... See full document

... Cache performance is becoming increasingly important, and it can have a dramatic effect on speedups obtained from parallel instruction execution. Figure 2 lists some cache miss times and the effect of a miss on machine ... See full document

... A table-driven policy daemon This section describes the design and implementation of screend, a table-driven policy daemon to make datagram access control decisions, to be used with the [r] ... See full document

... We did not find that SNFS outperformed NFS as much as Sprite was supposed to have outper- formed NFS [5]. One reason may be that the NFS we used has been adjusted to place perfor- mance ahead of consistency; perhaps this ... See full document

... the 3/2 reduction factor found in Wallace trees (see Figure ...Figure 3-8 shows an example of this method of summand reduction for ...to 3 in four ranks, then use a single rank of carry-save adder ... See full document

... Benefits of Additional Vector Support There are several obvious limits of the performance of this floating-point architecture: • only 1 FP ALU operation may issue per cycle • only 1 Load[r] ... See full document

... The cache associativity also affects latency. For example, by increasing the associativity the average access latency may be reduced a few percent due to a higher hit rate. However, a much more important effect is ... See full document

... Thus in order to exploit emerging technologies, advanced packaging technology must be used to partially ameliorate the effects of the lower density available in the emerging technology. For example, the Cray-3 ... See full document

... If the ratio of sustained performance to peak performance is less than one (and it must be at least a little less than one for all practical machines), then some of the resources of the machine are effectively being ... See full document

... Cache performance is becoming increasingly important, and it can have a dramatic effect on speedups obtained from parallel instruction execution. Figure 4 lists some cache miss times and the effect of a miss on machine ... See full document