7.2. Performance of DIM and ITM
7.2.2. Active Hut
To analyze the effect of HuT side sources, consider the HuT side of the test to be as shown in Fig. 7.14.
Fig.7.14. System under study with active HuT.
Based on (6.2), for calculating R* and L*, voltage and current of HuT, i.e. vH
and iH are required. However, the voltage across the combination of RH and LH is
146
vH – vHs. This difference will result in a totally wrong calculation of Z*. Note that, the HuT network in Fig. 7.14 is simplified to some equivalent elements to ease the study.
Therefore, from a practical point of view, vHs may not be accessible. Moreover, for more complex HuT networks with several branches and sources, such separation of elements may be totally impossible. Furthermore, as mentioned before, in real PHIL tests it is assumed that there is not much information about the HuT.
Example 7.5: Consider DIM and ITM PHIL implementation of a system with HuT side circuit as given in Fig. 7.14 and the virtual side network as Example 7.2.
The HuT side resistance and inductance are chosen as RH = 15 Ω and LH = 20 mH respectively, indicating a stable ITM PHIL implementation. Therefore, no LPF is used for ITM interface. The voltage errors of the PHIL implementations with vHs = 10 sin (t + 15˚) kV is shown in Fig. 7.15. As can be inferred from this plot, even though the ideal split of the system i.e. ITM is stable, miscalculation of Z* leads to unstable PHIL implementation.
Fig.7.15. Voltage error of PHIL tests with active HuT.
Discussion of 7.2.2 and Example 7.5, demonstrate the poor performance of DIM interface in presence of sources at the HuT side.
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Abovementioned discussions and examples emphasize the importance of accurate estimation of HuT impedance on the accuracy of PHIL implementation with DIM interface. In addition to Z*, the impedance ZVH can also influence the performance of DIM interface. Referring to Fig. 7.7, it is clear that ZVH must be exactly the same at both the sides of the test. Practically, it is not easy to comply with this condition considering the fact that the real world resistors and inductors characteristics may vary with factors like temperature. It should also be noted that, when ZVH is a pure resistance, it will cause power loss at the HuT side especially in presence of high currents.
Considering the discussions of this and previous chapters, advantages and drawbacks of ITM and DIM can be summarized as Table 7.2.
7.3. CONCLUSIONS
In this chapter, effects of IA on performance of PHIL tests have been studied.
The main two interface algorithms, ITM and DIM, have been discussed and tested under different conditions. It has been demonstrated that, while the simple implementation of ITM is an advantage, DIM is able to provide stable PHIL system under certain conditions. However, DIM performance is adversely influenced by accuracy of Z* computation. Miscalculation of Z* not only leads to inaccurate results, but also may cause instability in some potentially stable PHIL implementations.
Moreover, discussions of this chapter highlight the importance of performing some pretest studies on HuT. By having some basic knowledge about HuT characteristics, the most appropriate interface can be selected.
148
Table 7.2. Summary of comparison between ITM and DIM.
ITM DIM
Advantages - Implementation is simple.
- It can be stabilized using an LPF.
- PHIL system is stable as long as Z* is calculated correctly.
Disadvantages - Stabilizing with LPF will impose some inaccuracy.
- ZVH must be precisely replicated in both HuT and virtual side.
- The HuT side ZVH can cause power loss.
- Calculating Z* is not easy and needs information of HuT.
- Stability and accuracy are highly dependent on the accuracy of Z* estimation.
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CHAPTER 8
CONCLUSIONS AND RECOMMENDATIONS
General conclusions of this thesis and recommendations for future work are presented in this chapter.
8.1. GENERAL CONCLUSIONS
The conclusions based on the discussions of the previous chapters are expressed as following.
1. Stability of PHIL implementation is highly dependent on the impedance value of the both sides of the test. Instability can be bypassed by limiting the PHIL operation merely on fundamental or some limited number of low frequency harmonics. However, this limitation will reduce the accuracy of PHIL implementation when replicating the high frequency or transient behavior of the system under study.
2. The interface between the virtual and the HuT sides also has a determining effect on stable operation of PHIL tests. Adding an LPF to interface increases the stability margins and improves PHIL stability. However, stability improvement through inclusion of an LPF sacrifices a portion of accuracy due to unavoidable phase shift imposed by the filter.
150
3. Another factor which changes the stability margins of PHIL system is the total time delay of the closed loop. This time delay mainly consists of the solution time-step of the real-time simulator. Smaller time-steps provide more stability margins.
4. The power amplifier in PHIL interface system may include a VSC.
The VSC and its associated filter and controller can provide a controlled low-pass filtering effect, which will result in improving the stability.
5. For both voltage type and current type interfaces, proper tuning of the VSC controller parameters will not only provides desired tracking performance but will also improve stability margins.
6. If the power amplifier structure includes a transformer, the requirements for appropriate utilization of the transformer must be taken into account. In presence of power electronics devices, to avoid transformer core saturation from an offset in flux, a DC cancellation scheme can be utilized. However, if a DC component is part of the original system under study, the results of the PHIL implementation will be erroneous. Moreover, the voltage drop of the transformer can be compensated by modifying the converter controller. As long as the tracking performance of the converter is stable, the potentially unstable PHIL systems will operate in a stable fashion with transformer based interfaces as well.
151
7. To implement a PHIL test, some pretest studies of HuT is crucial.
Based on the results of the preliminary probe of HuT, the most appropriate interfacing method can be identified.
8.2. RECOMMENDATIONS FOR FUTURE WORK
Some possibilities for future research in the area of PHIL implementation are listed below.
1. Accuracy improvement by developing solutions for phase shift compensation imposed by low-pass filtering of the feedback signal.
2. Utilizing a back-to-back converter as the power amplifier to facilitate bidirectional power flow between HuT and the virtual network.
3. Three-phase implementation of PHIL systems and investigating the effect of unbalanced three-phase systems on the converter controller operation.
4. Developing robust interface algorithms that can ensure stable PHIL operation irrespective of the HuT parameters.
5. Employing high bandwidth converters as interface to study high frequency transient responses of power systems.
6. PHIL implementation of high power systems and considering their requirements.
7. Investigation on possibilities and requirements of Power-Electronics-Hardware-in-the-Loop implementations.
152
153
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