Application of defect filtering layer in GaAs/Si material system

GaAs epitaxy on Si substrates has been recognized as a desirable technology to integrate III-V compound-based device and Si electronic circuitry[3–5]. The reasons for this interest include the possibility of combing the high speed and optoelectronic capabilities of GaAs devices with well- known advantages of high density Si very large scale integrated technology. However, the heteroepitaxial growth of GaAs on Si faces several problems including anti-phase domains, 4.1% lattice mismatch, and large thermal expansion coefficients differences[6,7]. Reduction of anti- phase domains can be achieved in part through the use of slightly miscut substrates that create double atomic steps at the interface[8,9]. The lattice mismatch and differences in thermal expansion coefficients between the two materials lead to the generation of misfit, threading dislocations, and residual stress in the GaAs film[10]. The reduction of TDD has been a more challenging endeavorwith the significant focus on the use of DFL.

Whelan et al provide a useful example of using DFL in GaAs grown on Si substrate in 1990[11]. They were used GaAsP/GaAs strained superlattice (SLS) as a DFL for preventing the migration of threading dislocations into the active region of GaAs epitaxial layer grown on Si. In the first experiment, they were grown SLS layers of thickness from 100-200 Å. The critical thickness was

calculated to be 200 Åbased on their design and 1% mismatch between GaAsP/GaAs. Thus, the range was chosen to study the bending effect at the critical thickness. The details structure of their samples shows in Fig 3.3. Sample A consisted of 3 packets of SLSs with 100Å layers and 3 packets of SLSs with 200Å layers. These two SLS packets were separated by 2000Å of GaAs. The second sample (B) used 150Å and 250Å SLS packets in a similar design. In the second set of experiments, two samples were also grown; in these samples, the material composition of the SLS remained the same, and a single SLS packet composed of three periods with 100nm thick layers was incorporated in each sample at distances of 0.5 and 0.01 µm from the respective GaAs/Si heterointerfaces.

Fig 3.3: Sample design for GaAsP/GaAs SLS defect filtering study by Whelan et al[11].

TEM was used to analyze the dislocation presents in the epitaxial layers. For the first pair of samples (A and B) no detectable bending of dislocation was observed at the layer interfaces in any of the SLS packets for any of the thicknesses 100- 250Å. In fact, most of the dislocation bending occurred at the first and last interface of each SLS packet, at the interface in contact with thick

GaAs layers (2000Å and above). This shows that each SLS packet acted as a singleDFL layer rather than a series of individual filtering interfaces. Unfortunately, the TEM images are not clear enough to show here.

In the second pair of samples with thicker 100nm SLS layers dislocation bending appeared to occur ateach layer interface in the SLS. Additionally, for the SLS placed close to the GaAs/Si interface avery high level of dislocations in the SLS was observed. This was interpreted as the strain field of the SLS attracting dislocations from the heterointerface. Fig 3.4 shows the defect bending behavior for the thick 100nm layer SLS placed 0.5μm away from theGaAs/Si interface. In general, the density of dislocations is significantly lower in theGaAs above the SLS, and many dislocations are observed along the SLS layer interfaces.

Fig 3.4: TEM cross section of a 3 layer 100nm SLS packet placed 0.5μm above a GaAs/Si interface[11]. It is useful to see the effect of DFL on optoelectronic devices performance. In the last few years, III-V quantum dots lasers on Si has attracted so much attention. As we mentioned before the threading dislocation in III-V epilayer on Si is the main problem. Tang et al showed the

improvement in the electrical performance of 1.3µm InAs/GaAs quantum dot (QD) lasers monolithically grown on Si substrate by using DFL[12]. They compared two different SLSs DFL to reduce TDD in GaAs epilayer on Si. In their experiment for each sample, three repeats of SLS DFLs separated by 400-nm GaAs spacing layers were grown on the top of a 1000nm GaAs buffer layer. Two types of SLSs, five-period of 10nm In0.15Ga0.85As/10nm GaAs and five-period of 10nm

In0.15Al0.85As/10nm GaAs were investigated in their study. After another 400nm GaAs spacing

layer, an InAs/GaAs dot-in-a-well structure was grown.

AFM and TEM analysis of uncapped InAs QDs showed that despite the use of different types of SLSs as DFLs, the InAs/GaAs QDs grown on the Si substrates share similar structural properties. In TEM image of both samples, a high TDD is generated at the GaAs/Si interface as a result of the large lattice mismatch. Authors referenced specific two-step low growth temperature method[13,14] which resulted in confining most of the defect in the first ~200 nm region, but still a quite high TDD (~109 cm−2) is propagating towards the active region. Fig 3.5 shows the SLSs

suppress the propagation of threading dislocations and shows that GaAs layers are visually dislocation free after two sets of InAlAs/GaAs SLSs with a few dislocations after the InGaAs/GaAs SLSs. TDD was estimated by TEM after each SLS and was plotted in Fig 3.5 (c). Nevertheless, the TEM results qualitatively indicate that both InGaAs/GaAs and InAlAs/GaAs SLSs DFLs have similar effects on the reduction of TDD due to similar strain field or misfit to GaAs. At such a level of dislocation density (<107cm-2), TEM measurements become unreliable

for quantitative comparison and they used Etch pit defects (EPD) measurement to confirm the TDD value. After three sets of SLSs, the TDD of 2x106 _cm−2 _{and 5x10}6 _cm−2 _{were reported for}

Fig 3.5: Cross-sectional TEM images of sample with (a) InGaAs/GaAs SLS and (b) InAlAs/GaAs SLS. (c) TDD measured at different position. After the third SLS, EPD technique was also used to estimate the defect density [12]

The authors were used photoluminescence (PL) to compare the optical properties of the samples with different DFL. The room-temperature emission from the sample with InAlAs/GaAs SLSs is about two times stronger than that with InGaAs/GaAs SLSs (Fig 3.6). Also, the integrated PL intensity at different temperatures was done for analyzing the effect of DFLs on the optical properties of the overgrown InAs/GaAs QDs.The emission peak and thermal activation energy were remained nearly the same for both samples and these were predicted the similar band structures of the QDs. They were concluded that, the emission intensity difference between the two samples is mainly attributed to the defect density in the materials and it was resulted in the sample with InAlAs/GaAs SLSs has less defects within the active region.

Fig 3.6: Room-temperature PL spectra and (b) integrated PL intensities as a function of temperature for the InAs/GaAs structure grown on Si substrates with InGaAs/GaAs and InAlAs/GaAs SLSs[12].

Another interesting example in the GaAs/Si system is a use of QD layers as dislocation bending sites to filter dislocations. Mi et al were introduced InAs QD DFL below a laser active region. Schematics for these lasers are shown in Fig 3.7[15,16]. By introducing InAs QD layers the threshold current was decreased from 1500 Acm-2 to 900 Acm-2. The improvement, in this case,

was attributed to dislocationsand antiphase domains being trapped at the GaAs/Si interface. The TEM cross section images showed the propagation and bending of the threading dislocation with diffraction conditions (Fig 3.8). In a continuation of this work, Yang et al studied thevariation of QDs DFL properties to understand thedislocation blocking mechanism[17]. The ability of a QD interface to bend a dislocation was calculated basedon the strain energy of the existing dislocation compared to theenergy released due to the formation of a misfit segment running beneath the quantumdot.

Fig 3.7: Schematic of self-organized In0.5Ga0.5As QD-laser heterostructures grown on Si substrates with the dislocation filter consisting of N QD layers (N = 0, 5, 10, and 15).