Basic MOSFET Operation

Figure 2.1 shows a schematic of a bulk silicon pMOSFET. The simple MOSFET is a four-terminal device, with a source, a drain, a gate and a substrate or body contact, each of which can be biased independently. For a pMOSFET, the source and drain are p+ _{doped and the substrate is n doped. Traditionally, p}+ _{poly-silicon is used as gate}

electrode, although as will be seen in Section 2.6, a metal with suitable workfunction can be employed instead. The gate electrode is insulated from the bulk silicon substrate by a thin oxide, typically SiO₂, such that the gate and silicon substrate form a parallel

plate capacitor with the oxide layer serving as the dielectric. When the voltage applied to the gate is zero, majority carriers (electrons) in the n-substrate are accumulated under the gate, thus isolating the source and drain regions. This prevents current flow along the channel and the MOSFET is in the off-state. As the gate voltage is increased (i.e. made more negative for a pMOSFET), the electrons in the bulk silicon substrate are repelled away from the Si/SiO2 interface, forming a depletion region under the gate,

devoid of free carriers. If the gate voltage is increased further, it becomes energetically favourable for holes in the p+ source and drain regions to populate the area under the gate forming an inversion layer, which serves as a conducting channel connecting the source and the drain, and the MOSFET is in the on-state. Since the drain is negatively biased with respect to the source, holes are able to flow along the channel from the source to the drain. Increasing the gate voltage even further increases the concentration of holes under the gate and also the drain current. Hence, the gate modulates the current flowing from the source to the drain. It is this drain current modulation that gives rise to the switching operation in fully integrated CMOS circuits.

Despite the simplicity of its operation, some of the effects observed in MOS- FETs, and in particular short-channel MOSFETs, can be quite complicated. In order to explore some of these effects, a quantitative discussion of the operation of a long- channel MOSFET now follows, which will serve as the basis for the short-channel effects, introduced in Section 2.5.

The behaviour of the long-channel MOSFET can be described under thegradual channel approximation, in which it is assumed that the electric field along the channel is much smaller than the electric field perpendicular to it [Shur, 1990]. Furthermore, the analysis is further simplified under the charge sheet approximation, which assumes that the minority carriers that form the inversion layer are located in a sheet at the semiconductor surface [Taur and Ning, 1998]. This implies that no voltage is dropped across the inversion layer and Poisson’s equation can be reduced to one-dimension.

The inversion charge density, Qinv, at a point x along the channel can be ex- pressed as:

Q_inv =C_ox(V_gs−V_t−V_c(x)) (2.1)

whereCox is the oxide capacitance, Vgs is the gate voltage with respect to the source,V_t is the threshold voltage of the device, which is assumed to be constant, and

Vc(x) is the potential at a distancex along the channel with respect to the source. The carrier velocity at a positionx in the channel,v(x), is related to the longi- tudinal electric field,ε(x), by the carrier mobility,µ, according to:

v(x) =µε(x) =µdVc(x)

dx (2.2)

where it is assumed that the carrier mobility is constant along the channel. The current flowing from the source to drain, I_ds, is given by the product of the inversion charge, the carrier velocity and the device width:

Ids(x) =W Qinv(x)v(x) (2.3)

Substituting Equations 2.1 and 2.2 into Equation 2.3, the drain current for the MOSFET can be written as:

Ids=CoxW µ(Vgs−Vt−Vc(x))dV_dxcx (2.4)

where it has been assumed that the drain current, Ids, is constant along the channel.

Equation 2.4 can be integrated, with the appropriate boundary conditions such thatVc(0)= 0 andVc(L)= Vds, to obtain the expression for the drain current:

I_ds =CoxW_Lµ " (Vgs−Vt)Vds− V2 ds 2 # (2.5)

The drain current has a maximum value when Vds = Vgs - Vt. This point corresponds to the MOSFET entering thesaturation regime, and thesaturation current can be expressed as:

Ids,sat=Cox₂W_Lµ(Vgs−Vt)2 (2.6)

The onset of the saturation regime in a MOSFET can be understood as follows. As the drain voltage of the MOSFET increases, the drain current increases according to Equation 2.5. However, the inversion charge at the drain,Qinv(L), decreases according to Equation 2.1, such that as Vds approaches Vgs - Vt, the inversion charge density approaches zero. This point is referred to as pinch-off, and results in a highly resistive region forming at the drain, since the inversion charge vanishes. Any further increase in V_ds will be result in the pinch-off point being moved towards the source, with the extra potential being dropped across this high resistive region near the drain. Hence, the drain current behaves as ifV_ds =V_gs - V_t, and saturates. At the saturation point, the gradual channel approximation breaks down, with carriers no longer being confined to the surface channel. Consequently, carriers are injecting from the pinch-off point into the drain depletion region and drift to the drain.

Whilst the assumptions made in the gradual channel approximation and charge sheet approximation are valid for describing the behaviour of long-channel MOSFETs, this simple modelcannot be used to describe the behaviour of short channel MOSFETs, in which, short channel effects such as punchthrough, drain-induced barrier lowering (DIBL), velocity overshoot and quantum mechanical tunnelling must also be considered [Tsividis, 1999]. Hot carrier effects also become increasingly important due to the higher longitudinal field experienced by carriers along the channel, resulting directly from scaling. A summary of these effects is presented later in Section 2.5.

the effects of parasitic elements that effect its behaviour. One of the most important parasitic elements is the finite resistance of the source and drain regions,R_s and R_d, respectively [Schroder, 2006]. In a conventional planar MOSFET, the source and drain regions are formed by ion implantation of dopants, which are activated by a high temper- ature anneal. The voltages specified so far, refer to those voltages applied at the drain and gate electrodes, thus neglecting any voltage dropped across the source and drain regions. In order to account for these effects, it is necessary to replace the voltages,V_ds

andVgs, with their intrinsic equivalents,Vds0 andVgs0 :

Vds→Vds0 =Vds−IdsRs−IdsRd (2.7)

Vgs→Vgs0 =Vgs−IdsRs (2.8)