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Benchmarks Description

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Synthesizable SystemC Benchmarks for High Level Synthesis

3.4 Benchmarks Description

Synthesizable SystemC Benchmark (S2CBench) suite is a collection of 12+1 pro-grams following the latest SystemC Synthesizable Subset draft 1.3. Some of the main objectives of S2CBench are:

• To enable the direct comparison of commercial HLS tools

• To test specific tool features classified as language support, synthesis optimiza-tion techniques and tool performance.

• To help researchers analyze and compare their own techniques.

3.4.1 Benchmark programs

Every benchmark program in S2CBench is designed to test particular features.

Described below, is a brief overview of the programs included in the suite, each categorized according to its application domain. The benchmarks are also classified into data-dominant (dd) or control-dominant (cd) designs. HLS usually achieves very good results for the former category, whereas it sometimes creates sub-optimal designs for the latter category.

Automotive and Industrial

The category includes applications normally used in embedded control systems, which perform extensive basic math operations and bit manipulations.

qsort (dd): Quick sort design sorts data in ascending order using the well-known quick

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sort algorithm. Sorting of data is important for designs, so that they can be analyzed easier and priorities be established. This design helps in verifying the support for basic HLS optimization techniques which include loop unrolling, array synthesis (reg-ister or memory) and function synthesis with pointer argument support. It should be noted that various disciplines require fast sorting. Thus, qsort design could be categorized into many other categories.

A2 Security

The Security category includes several algorithms for data encryption and hashing.

HLS has proved to be a very good solution for designing data security applications due to their mathematical complexity. Moreover, these types of applications are very difficult to verify in RTL [55].

aes_cipher (dd): Advanced Encryption Standard (AES) Cipher encryption algo-rithm performs encryption/decryption. This program consists of many user-defined functions. It contains a large number of small for loops having inter-loop data de-pendencies. The main optimization techniques addressed are input port expansion, array synthesis (memory or registers), function synthesis (inline or goto operators) and large fixed arrays synthesized as logic or ROMs.

kasumi(dd): Kasumi is a block cipher algorithm used in mobile communication systems. The SystemC description includes two threads and multiple functions.

Therefore, this design is useful to verify the synthesis and especially the verifica-tion of multi-process systems. The design also contains multi-dimensional I/O ports and multiple arrays. Finally, the kasumi algorithm, similar to most encryption appli-cations, contains large amount of logic operations (e.g. and, or, xor). HLS tools are

notably not efficient, for accurately estimating the critical path of these applications, because the discrete delay of all the operations are simply added, thus overestimating the critical path. This application can provide an indication of the accuracy of the HLS timing report, compared to that of the logic synthesis result.

md5C(dd): The Message Digest Algorithm is widely used in cryptography to generate hash functions and check data integrity. MD5C is a single process design consisting of multiple functions, arrays of different bit widths and different levels of loop nesting. One of the unique language constructs to be tested with this design is the extensive use of define macros.

snow3G (dd): Snow 3G is a stream cipher that produces a key stream that con-sists of 32-bit blocks using a 128-bit key. Apart from the main optimization options, this design tests the support of HLS tools for templates. A variable length multipli-cation operation is performed in this algorithm, which may be easily simplified using templates.

A3 TelecommunicationWith the explosion of portable electronic devices using wireless communication, constrained by limited power budgets, some of the telecom-munication functions are frequently being implemented as custom HW blocks in SoCs (Systems on Chip). HLS is a natural choice for most of the complex applications in this domain, having well known legacy C descriptions.

adpcm (cd): Adaptive Differential Pulse-Code modulation (encoder part only) accepts 16-bit Pulse Code Modulation (PCM) samples as input and converts them into 4-bit samples. Some of the optimization techniques that can be tested with this design are loop unrolling, function synthesis, fixed array synthesis, the most important being the support for inclusion of structures. Some HLS tools do not support the use

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Table 3.1: Benchmark domain and optimization summary

Design Type Domain Optimization and language support

qsort dd Auto/Ind. loops, arrays, functions, pointers

sobel dd Auto/Ind. loops, functions, I/O array expansion, multi-dimensional arrays expansion, fixed arrays AES cipher dd Security I/O array expansion, multi-dimensional arrays expansion, large fixed arrays

Kasumi dd Security multi-process, delay report accuracy

md5c dd Security #define macros delay report accuracy

adpcm cd Telecom structures

FFT dd Telecom floating point, trigonometric functions

FIR filter dd Consumer I/O array expansion, arrays, loops, functions, Sum of Products (SoP) decimation dd Consumer Resource sharing across loops, fixed point data type, SoP Interpolation dd Consumer Polynomial decompositions, fixed point data, SoP

IDCT dd Consumer #include statement to initialize arrays

disparity cd/dd Consumer hierarchical design, multi-dimensional array expansion, synthesis running time

of structures, forcing the designer to re-rewrite the original descriptions manually.

fft (dd): (Fast Fourier Transform): The fft algorithm is the only design in the benchmark suite that is not synthesizable since the design includes floating- point data and trigonometric operations, which are not synthesizable as per the latest synthesizable subset draft. However, the design has been included as part of the suite since most HLS vendors do support floating point and trigonometric operations, though the process of synthesizing is vendor specific. It is important to understand the level of support for these operations by the HLS tool.

COMPARE

Fig. 3.1: Structure for testbench validation

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