Bundled Data Protocol

This protocol refers to a situation where the handshaking signals (Req - Request and Ack - Acknowledgment) are bundled with the data signals. It is also referred to

as single-rail protocol, which hints toward the usage of one wire to carry one bit of data. The signals between the atomic components in this protocol are presented in

Figure2.3. It can further be divided into two protocols based on the interpretations

of handshaking signals. These protocols are :4-phase bundled data and 2-phase bundled

data.

FIGURE2.3: Signals in Bundled Data Protocol (Dot = Sender) [4]

4-phase bundled data protocol is also known as Return To Zero (RTZ) signaling

or level signaling. Events happening in this protocol are presented in Figure2.4and

can best be described as follows :

• Sender issues data and setsReqsignal high.

• Receiver absorbs the data and setsAcksignal high.

• Sender responds by takingReqlow (at this point, data is no longer guaranteed

to be valid).

• At last, the receiver acknowledges this by takingAcksignal low. After this, the

sender may initiate the next communication cycle.

FIGURE2.4: Signal transitions for 4-phase bundle data protocol [4]

Having simplicity as its advantage, this protocol has a disadvantage in its superfluous return-to-zero transitions that cost time and energy. If the time to process valid data (when “Req” signal is high) and time to process null data (when “Req” signal is low) are considered to be equal, then the resultant data rate or throughput gets reduced by a factor of 2.

To overcome these disadvantages, 2-phase bundled data protocol can be used

which is also known as Non Return to Zero (NRZ) signaling or transition signaling.

Now information onReqandAcksignal is transferred as transitions, and, there is no

difference in 1→0 and 0→1 transition. Events happening in 2-phase bundled data

protocol are shown in Figure2.5and can best be described as follows :

• Sender puts valid data on the bus and shows a transition (rising edge in Figure

• Receiver accepts this data and shows a transition (falling edge in Figure2.5)

onAcksignal. This completes the communication and sender can now initiate

a new cycle of communication.

FIGURE2.5: Signal transitions for 2-phase bundle data protocol [4]

Ideally the 2-phase bundled-data protocol should lead to faster circuits than the 4-phase bundled-data protocol (no time for processing null data, when “Req” signal is low), but often the implementation of circuits responding to transitions is complex and there is no general answer as to which protocol is best.

It is also important to note that all the bundled data protocols rely on delay

matching for correct operation. Delay matching is a way for maintaining proper synchronization in asynchronous circuits by trying to match the delay of control circuitry with delay of datapath to ensure that correct data is read and written. The

data should be valid before the Req signal is set high by the sender. This order

should also be valid at the receiver, otherwise invalid data will be read by receiver. This order is ensured by delay matching. While designing the physical layout of a circuit, some problems are still faced in terms of delays, therefore, additional delay chains have to be introduced to cope up with the timing issue.

A 4-phase bundled data protocol is simple to implement using Muller’s pipeline. Muller’s pipeline is an arrangement of latches, combinational circuits, control circuits and delay chains which provides a basic setup for designing asynchronous

circuits. AFIFObuffer with latches based on Muller’s pipeline is presented in Figure

2.6. Also, an example circuit where a functional block is added in the path along

with matching delays (in Req signal path) is presented in Figure 2.7. In spite of

simple implementation, there a few drawbacks of 4 phase bundled data protocol:

introduction of matching delays, slow speed and sensitivity toPVTvariations.

FIGURE 2.7: A general 4-phase Bundled Data Protocol

implementation using Muller’s pipeline [4]

A 2-phase bundled data pipeline also uses a Muller pipeline. But the control signals are interpreted as events or transitions, see Figure2.8. For this reason special capture-pass latches are needed: events on the C and P inputs alternate, causing the latch to alternate between capture mode (capture input data) and pass mode (provide output data).

At the conceptual level, the 2-phase bundled-data approach is elegant and efficient; compared to the 4-phase bundled-data approach, it avoids the power and performance loss that is incurred by the return-to-zero part of the handshaking. However, edge sensitive devices are often more complicated than level sensitive devices. In addition to storage elements, conditional control logic that responds to signal transitions tends to be complex as well. Thus, the 2 phase bundled data approach may be the preferred solution in systems with unconditional data-flows and very high speed requirements.

FIGURE 2.8: 2-phase Bundled Data Protocol implementation using Muller’s pipeline [4]