! Warning Improper handling of backup batteries can cause injuries and property dam age.
CPU 313, 314, 314 IFM 315, 315-2 DP, 316 CPU 312 IFM
10.5 Clock and Operating Hours Counter
The CPUs have an integrated clock. The characteristics of the clock differ in dependence on
S The version (hardware or software) and
S The backup functions of the CPU.
Some CPUs also provide an operating hours counter. This can be used to count the operating hours for the CPU or for a connected item of equipment. You can adjust and read the clock using the programming device (see STEP 7 User Manual) or program the clock in the user program using SFCs (see Sys-
tem and Standard Functions Reference Manual and also Appendix B).
The operating hours counter is also programmed in the user program using SFCs (see System and Standard Functions Reference Manual and also Ap- pendix B).
Table 10-5 shows the characteristics and functions of the clock for the vari- ous CPUs.
Functions such as synchronization and correction factors can be set on para- meterizing the CPU in STEP 7, see Section 10.7.7 and the online help func- tion of STEP 7.
Table 10-5 Characteristics of the Clock for the CPUs
Characteristics 312 IFM 313 314 314 IFM 315 315-2 DP 316
Type Software clock Hardware clock (integrated “real-time clock”)
Manufacturer setting DT#1994-01-01-00:00:00
Backup Not possible S Backup battery
S Rechargeable Battery Operating hours counter
Value range
– 1
0 to 32767 hours Accuracy
S with power supply switched on
0 to 60_ C
S with power supply switched off
0_ C 25_ C 40_ C 60_ C
... max deviation per day:
"9s +2s to –5s "2s +2s to –3s +2s to –7s Introduction Characteristics
The following table shows the clock behavior with the CPU in POWER OFF mode depending on the backup:
Backup Clock Behavior
With backup battery The clock continues to operate in POWER OFF mode. With rechargeable
battery
The clock continues to operate in POWER OFF mode for the backup time of the rechargeable battery. In POWER ON mode, the rechargeable battery is recharged.
In the event of backup failure, an error message is not gener- ated. At POWER ON, the clock continues to operate using the clock time at which POWER OFF took place.
None At POWER ON, the clock continues to operate using the clock time at which POWER OFF took place. Since the CPU is not backed up, the clock does not continue at POWER OFF. In POWER OFF
10.6
Blocks
This section provides an overview of the blocks that can be executed by your CPU.
The operating system of the CPU is designed for event-driven scanning of the user program. The following tables show which organization blocks (OBs) the operating system automatically invokes in response to which events.
A detailed description of the event-driven scanning of the user program is provided in the Program Design Programming Manual. The description of the OBs and their start events listed here are described in detail in the System
and Standard Functions Reference Manual. You will find an overview of the
complete STEP 7 documentation in Appendix G.
Overview Table 10-6 lists all the blocks that the CPUs can execute.
Table 10-6 Overview: Blocks of the CPUs
Block Number Area Maximum Size Remarks
312 IFM 314 IFM 313 314 315 316 315-2 DP 312 IFM 313 314 314 IFM 315 316 312 IFM 313 314 314 IFM 315 315-2 DP 316 OB 3 13 14 – Limited by CPU RAM
8 KB1 16 KB1 All possible OBs
are listed below this table FB 32 128 0 – 31 0 – 127 8 KB1 16 KB1 – FC 32 128 0 – 31 0 – 127 8 KB1 16 KB1 – DB 63 127 1 – 63 1 – 127 8 KB1 0 is reserved SFC 35 49/ 45 for CPU 313
54 – – see also Appen-
dix A.
SFBs 9 14 7 7 – see also Appen-
dix A.
1 Part of the block relevant for execution
Introduction
Further Informa- tion
Table 10-7 lists the OBs that determine the CPU’s response to scan cycle and restart events.
Table 10-7 OBs for Scan Cycle and Restart
Scan Cycle and Restart Invoked OB Possible Start Events
Default OB Priority
Scan Cycle OB 1 1101H, 1103H Lowest priority
Restart (transition from STOP to RUN) OB 100 1381H, 1382H –
Table 10-8 lists the OBs that determine the CPU’s response to interrupt events.
You cannot change the priority scheduling of the OBs.
For the cyclic interrupt OB 35, you can set times from 1 ms upwards. If you set a time lower than 5 ms cyclic interrupt errors can still occur, despite shorter program execution times of the OB 35 program.
Table 10-8 OBs for Internal and External Interrupts
Interrupts (Internal and External) Invoked OB Possible Start Events
OB Priority Priority
p ( )
312 IFM 313 to 316 Events
y y
Time-of-day interrupt – OB 10 1111H 2 Low
Delay interrupt
Range: 1 ms to 60000 ms (can be set in 1 ms increments)
– OB 20 1121H 3
Cyclic interrupt
Range: 1 ms to 60000 ms (can be set in 1 ms increments; we recommend a setting > 5 ms)
– OB 35 1136H 12
Process interrupt OB 40 1141H 16
Diagnostic interrupt – OB 82 3842H, 3942H 26 High
If you have not programmed an interrupt OB, the CPU reacts as follows:
CPU Goes to STOP with Missing ... CPU Remains in RUN with Missing ...
OBs for Scan Cycle and Restart
OBs for Internal and External Inter- rupts
OB 35
CPU Reaction with Missing Interrupt OB
Table 10-9 lists the OBs that determine the CPU’s response to errors and faults.
Table 10-9 OBs for Error/Fault Response
Error/Fault Invoked OB Possible Start Events Default OB Priority 312 IFM 313, 314, 314 IFM, 315, 316 315-2 DP Events Priority Time-out
(triggered, for example by the scan time monitor)
– OB 80 3501H, 3502H,
3505H, 3507H
26
Power supply fault (missing backup battery)
– OB 81 3822H, 3922H 26
One of the following program execution er- rors has occurred:
Event for starting an OB (for example time-out) has occurred, but the associ- ated OB cannot execute
Error when updating the process image (module or DP slave defective or not plugged in)
Error when the operating system has ad- dressed a non-existent block (for exam- ple the DB for an integrated function is deleted)
– OB 85 35A1H,
35A3H, 39B1H, 39B2H,
26
A node in the PROFIBUS-DP subnet has failed or been restored
– – OB 86 38C4H, 39C4H 26
Communications error
Wrong frame identifier when receiving global data
The data block for the status of the global data is missing or too short
– OB 87 35E1H, 35E2H,
35E6H
26
Programming error
(for example, timer addressed does not exist)
– OB 121 2521H, 2522H, 2523H, 2524H, 2525H, 2526H, 2527H, 2528H, 2529H, 2530H, 2531H, 2532H, 2533H, 2534H, 2535H, 253AH; 253CH, 253EH Same priority as the OB in which the error occurred
Error when making direct access to I/O (module defective or not plugged in)
– OB 122 2944H, 2945H Same priority as
the OB in which the error occurred OBs for Error/Fault
Please note the following special features of the S7-300 regarding OBs 121 and 122:
Note
Please note the following special features with OBs 121 and 122:
The CPU enters in the OBs’ local data value “0” in the following temporary variables of the variable declaration table:
Byte No. 3: OB121_BLK_TYPE or OB122_BLK_TYPE (type of block in which error occurred)
Bytes No. 8 and 9: OB121_BLK_NUM or OB122_BLK_NUM (number of block in which error occurred)
Bytes No. 10 and 11: OB121_PRG_ADDR or OB122_PRG_ADDR (address in the block in which error occurred)
If you have not programmed an error OB, the CPU reacts as follows:
CPU Goes to STOP with Missing ... CPU Remains in RUN with Missing ...
OB 80 (time-out)
OB 85 (program execution error) OB 86 (node failure in
PROFIBUS-DP network) OB 87 (communications error) OB 121 (programming error) OB 122 (I/O direct access
error)
OB 81 (power supply fault) OBs 121 and 122
CPU Reaction with Missing Error OB
10.7
Parameters
You can program the characteristics and behavior of the CPUs. You set the parameters in STEP 7 in various registers (see STEP 7 documentation and online help of STEP 7).
Table 10-10 lists all registers in which you can parameterize the CPUs. The table also shows which registers you can call for the separate CPUs.
Table 10-10 Registers of the CPUs
Register 312 IFM 313 314 314 IFM 315 315-2 DP 316 In Section Page Startup Yes 10.7.1 10-20
Scan cycle/clock me- mories
Yes 10.7.2 10-21
Retentive areas Yes 10.7.3 10-23
Interrupts Yes 10.7.4 10-25
Time-of-day interrupts No Yes 10.7.5 10-26
Cyclic interrupts No Yes 10.7.6 10-27
Diagnostics/clock1 Yes 10.7.7 10-28
MPI address Yes 10.7.8 10-30
Integrated I/O Yes No Yes No 10.7.9 10-31
Protection/Mode Yes 10.7.10 10-34
1 No clock for CPU 312 IFM
You use STEP 7 to assign the CPU its parameters (see STEP 7 User Manual or STEP 7 on-line help).
The CPU accepts the parameters (configuration data) you have set
when it is powered up (POWER ON)
following a memory reset with the key-operated mode selector if a memory card with the configuration data is plugged in (for CPU 312 IFM and 314 IFM from the integrated retentive program memory)
If there is no memory card with the configuration data, the CPU accepts the default parameters from the SDB2. Exception: The MPI parameters remain unchanged.
when the parameters have been passed on-line without error to the CPU in the STOP mode.
Programmable Characteristics of the CPUs
Parameter Assign- ment Tool
When Does the CPU Accept Pa- rameters