Components

5.2.1 Avalanche Photo-Diode (APD)

Only two brands of APD on the market had a sufficient time resolution for the LDM, the PDM from Micro Photon Devices [154] and the id100 from ID Quantique [158]. Table 10 shows that

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while the characteristics of both devices are similar, the id100 has some advantages, most notably a smaller deadtime.

Table 10. Manufacturer’s specifications of the two APDs [158][154].

Id100 PDM

Photon Detection Efficiency

(averaged over visible range) 20 % 35 %

Deadtime 45 ns 77 ns

Time resolution (FWHM) 40 ps 50 ps

Active area diameter 50 μm 50 μm

Dark count rate 20 Hz 250 Hz

Afterpulse probability 3 % 3 %

Both devices were tested in the lab and in operation in the LHC, with the PDM initially installed on beam 2 in October 2010 and the id100 on beam 1 in March 2011. In addition, a test was carried out with a fibre-coupled id100 detector which is described below.

Two issues were identified with the response of the id100 detector. Firstly, its diffusion tail was considerably longer than that of the PDM. Thus, although it has a slightly narrower time resolution by the FWHM measure, the time response was much less suitable for the purposes of the LDM. While the diffusion tail of the PDM blinds the detector to the bucket following the main bunch, that of the id100 blinds it for at least 4 buckets, meaning that none of the trailing satellites were visible. The much larger diffusion tail is clearly seen with the logarithmic scale of Figure 67.

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Figure 67. APD counts against time. Comparison of the time response of the two detectors. Left: Beam 1 longitudinal profile, measured with the id100. Right: Beam 2 longitudinal profile, measured with the PDM.

The second problem arises when the pulse repetition rate is similar to the deadtime of the id100. When the operating voltage is restored to the APD, there is a slight overshoot. Any photons arriving during this overshoot phase have a higher avalanche probability and the avalanches propagate faster. This is particularly problematic for the LDM case since the deadtime of the id100 is approximately 45 ns, which is close to the 50 ns bunch separation in the standard LHC filling scheme. When the id100 was used during this filling scheme, a false peak appears in the profile around 1 ns before the second and subsequent bunch of each train. This is caused by the shorter propagation delay of some of the avalanches from the main bunch.

Because of these two problems, the PDM was chosen as the detector for the LDM, and the id100 detector which had been installed on beam 1 was replaced with a PDM in August 2011.

5.2.2 Time-to-Digital Converter (TDC)

The TDC used is an Acquiris TC890 (also called Agilent U1051A) [159]. The TC890 is a multi-stop TDC so that the time stamps of many STOP pulses can be given relative to each START. For each STOP pulse, the time difference between it and the last START is recorded. The TC890 has 6 STOP channels, so that both the LDMs (corresponding to the two LHC beams) are recorded in the same TDC.

The START pulse is provided at the revolution frequency by the LHC Beam Synchronous Timing (BST) system [160]. The BST optical signal is converted into an electrical pulse by a BOBR

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module [161]. The STOP signals are the electrical pulses generated by the PDM. The minimum separation of two STOPs is 15 ns; since this is less than the deadtime of the PDM it has no effect on the measurements. A minimum separation of 15 ns between STOP and START pulses is also required. In fact, some STOP pulses arriving within +/- 15 ns of the START pulse are counted, but some are lost. This means that the LDM has a reduced sensitivity for a 30 ns period in each turn. In order to reduce the impact of this ‘blind spot’, the START pulse should ideally arrive during the Abort Gap. However, since the same START pulse is used for both beams and they are not in phase at IP4 where the LDM is located, this condition cannot be met for both beams. The START pulse is located in the Abort Gap for beam 2, and in bucket 26,664 for beam 1.

The minimum bin width of the arrival time histogram is set by the value of the least significant bit (LSB) in the TDC time-stamp. The TC890 has a LSB value of 50 ps. The maximum time difference is 10.48 ms. This is never reached in the LDM case since the LHC revolution period is

~89 μs.

Each input channel has an impedance of 50 Ω and is equipped with a voltage comparator. The

threshold can be set between +/- 1.5 V. The common START channel is set to +1 V, while the two STOP channels are set to -0.4 V. In each case this is approximately half the pulse height. The rising edge of the pulse is steepest in this region, leading to the minimum time jitter. The maximum count rate is limited mainly by the data read-out rate. The TC890 is equipped with two 8 Mbyte internal memory buffers which operate in ping-pong mode, i.e. one buffer is read out while the other records events; the buffers are switched when the recording buffer is almost full. Each hit is recorded as a 4-byte word, so that each buffer can contain 2x106 _events. Timestamps can be written to the buffer at a rate of 5x107 _{events per second per channel.} However this rate can be sustained only for a short time, otherwise the recording buffer will fill up before the other buffer has been read out. In this case the TDC is frozen until the buffer can be fully read out, and some events are lost.

The TC890 is built in Compact PCI (cPCI) [162] architecture and data is streamed to the computer via the cPCI bus. This allows a data throughput of approximately 100 MB / s. The maximum average count rate is thus limited to 25x106 _{events / s.}

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5.2.3 Beam Synchronous Timing System

The Beam Synchronous Timing (BST) system [160] is responsible for distributing the LHC turn and bunch clocks. The clocks are distributed by fibre-optic link and converted locally to an electrical pulse which is sent to the common START channel of the TDC. The optical fibre also carries a data stream which is interleaved with the clock signals and which gives information on the state of the machine.

5.2.4 Data Handling

The front-end CPU for the LDM is located in the cPCI crate alongside the TDC. It is responsible for control of the TDC and processing of the data. The CPU is a PP-712-083 produced by Concurrent Technologies [163] running the CERN Scientific LINUX operating system.