CoolMOS ® Section

Parameter Symbol Limit Values Unit Test Condition

min. typ. max.

Peak Current Limitation

(incl. Propagation Delay) V_csth 0.88 1.06 1.13 V dV_sense/ dt = 0.6V/ms (see Figure 13) Peak Current Limitation during

Active Burst Mode V_CS2 0.22 0.26 0.29 V

Leading Edge Blanking t_LEB - 220 - ns

CS Input Bias Current I_CSbias -1.5 -0.2 - mA V_CS=0V

Parameter Symbol Limit Values Unit Test Condition

min. typ. max.

Drain Source Breakdown Voltage V_(BR)DSS 650 - - V T_j= 110°C¹⁾(Refer to Figure 65 for other V_(BR)DSSin different T_j) V_GS=0V, I_D=0.25mA Drain Source Avalanche

Breakdown Voltage V_(BR)DS - 700 - V V_GS=0V, I_D=3A

Drain Source On-Resistance R_DSon

-1.02.2 2.7

1.192.63 3.21

WW W

T_j= 25°C T_j=125°C¹⁾ T_j=150°C¹⁾ at I_D= 2.6A

1) The parameter is not subjected to production test - verified by design/characterization Effective output capacitance,

energy related C_o(er) - 21 - pF V_DS= 0V to 480V¹⁾

Rise Time t_rise - 30²⁾

2) Measured in a Typical Flyback Converter Application

- ns

Fall Time t_fall - 30²⁾ - ns

5 Typical Controller Performance Characteristics

Figure 27 Start Up Current I_VCCstart

Figure 28 VCC Charge Current I_VCCcharge1

Figure 29 VCC Charge Current I_VCCcharge2

Figure 30 VCC Charge Current I_VCCcharge3

Figure 31 VCC Supply Current I_VCCsup1

Figure 32 VCC Supply Current I_VCCsup2

Junction Temperature [°C]

StartUpCurrentIVCCstart[µA] PI-001-8889A23

120

Junction Temperature [°C]

VccChargeCurrentIVCCcharge1[mA] PI-002-8889A23

0.60

Junction Temperature [°C]

VccChargeCurrentIVCCcharge2[mA] PI-003-8889A23

0.60

Junction Temperature [°C]

VccChargeCurrentIVCCcharge3[mA] PI-004-8889A23

0.45

Junction Temperature [°C]

VccSupplyCurrentIVCCsup1[mA] PI-005-8889A23

1.30

Junction Temperature [°C]

VccSupplyCurrentIVCCsup2[mA] PI-006-8888A12_ICE3BR1065JF

2.4

Figure 33 VCC Supply Current I_VCCrestart

Figure 34 VCC Supply Current I_VCCburst

Figure 35 VCC Turn-On Threshold V_VCCon

Figure 36 VCC Turn-Off Threshold V_VCCoff

Figure 37 Reference Voltage V_REF

Figure 38 Oscillator Frequency f_OSC1

Junction Temperature [°C]

VccSupplyCurrentIVCCrestart[uA] PI-007-8889A23

210

Junction Temperature [°C]

VccSupplyCurrentIVCCburst[uA] PI-008-8889A23

400

Junction Temperature [°C]

VccTurn-OnthresholdVVCCon[V] PI-010-8889A23

17.5

Junction Temperature [°C]

VccTurn-OffThresholdVVCCoff[V] PI-010-8889A23

10.0

Junction Temperature [°C]

ReferenceVoltageVREF[V] PI-011-8889A23

4.80

Junction Temperature [°C]

OscillatorFrequencyfosc1[kHz] PI-012-8889A23

60

Figure 39 Frequency Jittering Range f_jitter

Figure 40 Max. Duty Cycle D_max

Figure 41 PWM-OP Gain A_V

Figure 42 Voltage Ramp Offset VOffset-Ramp

Figure 43 Feedback Pull-Up resistor R_FB

Figure 44 Clamped V_BAvoltage V_BAclmp

Junction Temperature [°C]

FrequencyJitterRangefjitter[+/-kHz] PI-001-8889A23

2.1

Junction Temperature [°C]

Max.DutyCycleDmax PI-014-8889A23

0.720

Junction Temperature [°C]

PWMOPGainAV PI-015-8889A23

3.00

Junction Temperature [°C]

VoltageRampOffsetVOffset-Ramp[V] PI-016-8889A23

0.63

Junction Temperature [°C]

FeedbackPull-UpresistorRFB[kOhm] PI-019-8889A23

10

Junction Temperature [°C]

ClampedVBAVoltageVBAclmp[V] PI-020-8889A23

0.85

Figure 45 Blanking time voltage limit V_BKC3

Figure 46 Over Load Detection Limit V_FBC4

Figure 47 Active Burst Mode Level V_FBC5

Figure 48 Active Burst Mode Level V_FBC6a

Figure 49 Active Burst Mode Level V_FBC6b

Figure 50 Overvoltage Detection Limit V_VCCOVP1

Junction Temperature [°C]

BlankingtimevoltagelimitVBKC3[V] PI-021-8889A23

3.90

Junction Temperature [°C]

OverLoaddetectionlimitVFBC4[V] PI-022-8889A23

4.30

Junction Temperature [°C]

ActiveBurstmodeLevelVFBC5[V] PI-023-8889A23

1.00

Junction Temperature [°C]

ActiveBurstModelLeveVFBC6a[V] PI-024-8889A23

3.50

Junction Temperature [°C]

ActiveBurstModeLevelVFBC6b[V] PI-025-8889A23

2.80

Junction Temperature [°C]

OvervoltageDetectionLimitVVCCovp1[V] PI-026-8889A23

20.0

Figure 51 Over Load Detection Limit V_VCCOVP2

Figure 52 Auto-restart Enable Level V_AE

Figure 53 Charging Current at BA pin I_BK

Figure 54 Peak Current Limitation V_csth

Figure 55 Peak Current Limitation V_CS2

Figure 56 Leading Edge Blanking t_LEB

Junction Temperature [°C]

OvervoltageDetectionLevelVVCCOVP2[V] PI-027-8889A23

25.0

Junction Temperature [°C]

Auto-restartEnableLevelVAE[V] PI-028-8889A23

0.28

Junction Temperature [°C]

ChargingCurrentatBApinIBK[µA] PI-029-8889A23

10.0

Junction Temperature [°C]

PeakCurrentLimitationVCSth[V] PI-031-8889A23

0.80

Junction Temperature [°C]

PeakCurrentLimitationVCS2[V] PI-032-8889A23

0.20

Junction Temperature [°C]

LeadingEdgeBlankingtLEB[ns] PI-033-8889A23

190

6 Typical CoolMOS ^® Performance Characteristics

Figure 57 Power dissipation; P_tot=f(T_C)

Figure 58 Safe operation area; I_D=f(V_DS), parameter : D=0, T_C=25°C

Figure 59 Transient thermal impedance;

Z_thJC=f(t_p),parameter: D=t_p/T

Figure 60 Typ. output characteristics;

I_D=f(V_DS),T_j=25°C, parameter : V_CC

Figure 61 Typ. output characteristics;

I_D=f(V_DS),T_j=150°C, parameter : V_CC

Figure 62 Typ. drain-source on-state resistance;

R_DS(on)=f(I_D); T_j=150°C, parameter : V_CC

limited by on-state resistance

Figure 63 Drain-source on-state resistance;

R_DS(on)=f(T_j); I_D=2.6A;, V_cc>10.5V

Figure 64 Avalanche energy;

E_AS=f(T_j),I_D=1.7A,V_DD=50V

Figure 65 Drain-source breakdown voltage;

V_BR(DSS)=f(T_j), I_D=0.25mA

Figure 66 Typ. capacitances;

C=f(V_DS),V_GS=0V,f=1MHz

Figure 67 Typ. Coss stored energy; E_oss=f(V_DS)

7 Input Power Curve

Two input power curves giving the typical input power versus ambient temperature are showed below;

Vin=85Vac~265Vac (Figure 68) and Vin=230Vac+/-15% (Figure 69). The curves are derived based on a typical discontinuous mode flyback model which considers either 50% maximum duty ratio or 100V maximum secondary to primary reflected voltage (higher priority). The calculation is based on R_thSA=2.7K/W as heatsink and R_thCS=1.1K/W as thermal grease thermal resistance. The input power already includes the power loss at input common mode choke, bridge rectifier and the CoolMOS. The device saturation current (I_{D_Puls}@ T_j=125°C) is also considered.

To estimate the output power of the device, it is simply multiplying the input power at a particular operating ambient temperature with the estimated efficiency for the application. For example, a wide range input voltage (Figure 68), operating temperature is 50°C, estimated efficiency is 80%, then the estimated output power is 96W (120W * 80%).

Figure 68 Input power curve Vin=85~265Vac; P_in=f(T_a)

Figure 69 Input power curve Vin=230Vac+/-15%; P_in=f(T_a)

Ambient Temperature [°C]

Inputpower(85~265Vac)[W] PI-003-ICE3BR1065JF_85Vac

0 15 30 45 60 75 90 105 120 135 150

0 10 20 30 40 50 60 70 80 90 100 110 120 130

Ambient Temperature [°C]

Inputpower(230Vac)[W] PI-004-ICE3BR1065JF_230Vac

0 20 40 60 80 100 120 140 160 180 200 220

0 10 20 30 40 50 60 70 80 90 100 110 120 130

8 Outline Dimension

Figure 70 PG-TO220-6-247 (PB-free Plating FullPak Package)

Dimensions in mm PG-TO220-6-247

(PB-free Plating FullPak Package Outline)

9 Marking

Figure 71 Marking for ICE3BR1065JF

Marking

10 Schematic for recommended PCB layout

Figure 72 Schematic for recommended PCB layout

General guideline for PCB layout design using F3/F3R CoolSET (refer to Figure 72):

1. “Star Ground “at bulk capacitor ground, C11:

“Star Ground “means all primary DC grounds should be connected to the ground of bulk capacitor C11 separately in one point. It can reduce the switching noise going into the sensitive pins of the CoolSET device effectively. The primary DC grounds include the followings.

a. DC ground of the primary auxiliary winding in power transformer, TR1, and ground of C16 and Z11.

b. DC ground of the current sense resistor, R12

c. DC ground of the CoolSET device, GND pin of IC11; the signal grounds from C13, C14, C15 and collector of IC12 should be connected to the GND pin of IC11 and then “star “connect to the bulk capacitor ground.

d. DC ground from bridge rectifier, BR1

e. DC ground from the bridging Y-capacitor, C4 2. High voltage traces clearance:

High voltage traces should keep enough spacing to the nearby traces. Otherwise, arcing would incur.

a. 400V traces (positive rail of bulk capacitor C11) to nearby trace: > 2.0mm b. 600V traces (drain voltage of CoolSET IC11) to nearby trace: > 2.5mm 3. Filter capacitor close to the controller ground:

Filter capacitors, C13, C14 and C15 should be placed as close to the controller ground and the controller pin as possible so as to reduce the switching noise coupled into the controller.

Guideline for PCB layout design when >3KV lightning surge test applied (refer to Figure 72):

1. Add spark gap

Spark gap is a pair of saw-tooth like copper plate facing each other which can discharge the accumulated charge during surge test through the sharp point of the saw-tooth plate.

a. Spark Gap 3 and Spark Gap 4, input common mode choke, L1:

Gap separation is around 1.5mm (no safety concern)

b. Spark Gap 1 and Spark Gap 2, Live / Neutral to GROUND:

These 2 Spark Gaps can be used when the lightning surge requirement is >6KV.

230Vac input voltage application, the gap separation is around 5.5mm 115Vac input voltage application, the gap separation is around 3mm

2. Add Y-capacitor (C2 and C3) in the Live and Neutral to ground even though it is a 2-pin input 3. Add negative pulse clamping diode, D11 to the Current sense resistor, R12:

The negative pulse clamping diode can reduce the negative pulse going into the CS pin of the CoolSET and reduce the abnormal behavior of the CoolSET. The diode can be a fast speed diode such as IN4148.

The principle behind is to drain the high surge voltage from Live/Neutral to Ground without passing through the sensitive components such as the primary controller, IC11.

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In document Version 2.1, 6 May 2011 (Page 23-36)