CUTE Mote Power Characterization

Microsemi’s flash-based architectures offer a very low-power solution for low duty cycle applications, with zero in-rush power (during power up) and very low power operations due to the Flash Freeze technology on the SmartFusion2 SoC family. This enables the CUTE mote to be used in typical very low-power applications, benefiting from all the advantages the deployed heterogeneous architecture can provide. The Flash Freeze power mode consists of an ultra low-power standby mode that sets the

FPGA fabric in a low-power quiescent state in which the state of the internal large static random-access memory (LSRAM), µRAM, and flip-flops are preserved. Entry into Flash Freeze typically occurs in less than 100 µs and exiting from this mode to I/O’s operational typically occurs in less than 200 µs. This can be simply done by using a system service API call to the system controller and/or using any external trigger.

Enabling this technology into the FPGA fabric, combined with the ARM Cortex-M3 low-power modes, results in a great design choice for heterogeneous low-power motes that can directly compete with typical COTS solutions based on homogeneous WSN sensor nodes. The Flash Freeze control can be integrated into the CUTE mote and Contiki-OS in applications that only operate reactively or periodically. This can be done in the following ways:

1. Integration of wake-up radios in the heterogeneous architecture;

2. Activation of radio duty cycling protocols in Contiki-OS;

3. Take benefit from the Contiki’s low-power mode operation.

Wake-up Radios

The design option of integrating wake-up radios into the architecture, such as used by the CookieWSN [105], can be applied to trigger the Flash Freeze control module.

This way the system keeps operating into a very low power state while there are no communications or tasks needed to be performed by the node. When a node desires to communicate, the wake-up radio will enable the regular operation mode again.

Radio Duty Cycling Protocols

Low-power radio hardware is not always enough to fulfill the low power requirements of some applications. Aiming to promote energy saving modes, Contiki-OS provides several duty cycling mechanisms that can be used to turn off the IEEE 802.15.4 radio transceiver when not in use. The purpose of a power-saving duty cycling protocol is to keep the radio disabled, while providing enough rendezvous points for two nodes to be able to communicate with each other. Such rendezvous points in a duty cycling protocol can be achieved in several ways, but usually a time-synchronized mode is preferred.

In Contiki-OS, such RDC protocols can be found at the MAC layer of the stack, more precisely in a sub-layer called RDC layer. By default Contiki-OS provides three duty cycling MAC protocols: ContikiMAC [137], X-MAC [138] and LPP [160].

ContikiMAC is a low-power listening-based protocol, such as the B-MAC [161], but with better power efficiency. Contiki’s X-MAC is based on the original X-MAC protocol, but with a significant set of improvements and extensions which contributes with reduced power consumption and helps in maintain good network conditions.

Contiki’s Low-Power Probing (LPP) is based on the original LPP protocol but with enhancements that improve power consumption, as well as provide mechanisms for sending broadcast data.

Aiming to save energy, the RDC layer tackles only the radio transceiver, controlling its utilization in the wireless network. In most of IoT applications, the device only enters into regular operation modes when the radio needs to send or receive messages.

Therefore, the overall energy consumption on the mote can be reduced if during the non-operational modes the device enters into the Flash Freeze mode, going periodically to the operation mode during the radio active time according to the RDC protocol in use. Despite of Contiki-OS providing such energy saving mechanisms at the radio level, for the testing purposes of the deployed accelerators, the RDC layer is disabled and the CSMA/CA mode (in the radio transceiver) is used instead.

Contiki-OS Low-power Operation Modes

Contiki-OS provides an API to enable low-power modes when all pending OS events are serviced. This is done by calling lpm_enter() on every scheduler run. Low-power modes are dependent from the MCU architecture and the device’s platform, thus, it must be implemented into Contiki-OS accordingly. When such modes are activated, the OS goes to the lowest supported power mode. In the CUTE mote hardware platform, such mode corresponds to the Flash Freeze sleep mode. Waking-up the system from this mode is done by resorting a sleep timer, which is internally controlled by the Contiki-OS according to the scheduler behavior.

Power Characterization

Table 3.2 summarizes the power characterization of the CUTE mote with two main low-power modes, active mode and Flash Freeze mode, running at 32 MHz. When running in normal operation the power consumption is, on average, 56.52 mW and

Table 3.2: CUTE mote hardware characterization.

Parameter Value

SoC SmartFusion2 SoC FPGA 90K LE

MCU Architecture 32-bit

Instruction Set Cortex-M3

Clock (MHz) 32

VCC (V) 1.2

PF lashF reeze (mW) 8.23

P_active (mW) 56.52

IPv6 packet soft-processing Accept Reject

taverage (µs) 254 292

P_average (mW) 56.52 56.52

E_average (nJ) 14356 16503

when the Flash Freeze mode is activated this value drops to 8.23 mW. Also, the energy needed to process one IPv6 packet in software is on average 14356 nJ and 16503 nJ for the accepting and rejecting situations, respectively. After offloading such tasks to hardware the energy consumption is expected to decrease. Since the duration of the active and Flash Freeze modes depends on the mote configuration and application requirements, the overall energy consumption cannot be directly calculated. Such task can only be performed after the CUTE mote being used in a real application scenario and the network requirements well defined.

3.6 Conclusions

This chapter proposed and described a heterogeneous architecture for endpoint de-vices in the IoT edge network. The architecture combined with the SmartFusion2 hardware platform forms the CUTE mote, which is described as a customizable and trustable end-device, specially tailored for low-power IoT applications. The architec-ture explores its heterogeneity by combining an MCU, which runs the Contiki-OS, and an RCU attached to an IEEE 802.15.4 radio transceiver. The RCU allows the development of accelerators for the network stack which can be used by the Contiki-OS for energy saving and performance purposes.

Despite these evaluations are important to characterize the CUTE mote and test the feasibility of the solution, the main focus of this thesis concerns the evaluation of accelerators that can be securely deployed on the RCU of the proposed architecture,

which can benefit from network-related accelerators at two levels: (1) by accelerating complex network-related tasks; (2) subsequent reduced system load by offloading software-based tasks to the accelerators. Since the main processing time concerns the processing of IEEE 802.15.4 Data frames and subsequent IPv6 packet processing, the evaluations are to be performed when the CUTE mote is in active mode, thus the mote will not enter low-power modes, such as the Flash Freeze. Security-related requirements are provided by the hardware platform, which complies with all the concerns previously discussed in Chapter 1. In the next chapters, the evaluated tasks and processes are deployed and tested on the RCU. This will help to understand the benefits of offloading selected tasks to hardware by comparing their performance with the software-based approach.

Chapter 4