List basic types of programmable logic devices
Step 8 Derive the input equations for each flip-flop based as functions of the input and current state of all flip-flops
There are many ways to produce the single equations for J0 and K0, including algebraic simplification and Karnaugh Maps. The method preferred by this author for producing a single equation for an entity such as J0
or K0 is as follows.
1. Use the “least complexity” matching rule as described above for each column of the expression. Thus, for J0, we shall have two expressions, one for X = 0 and one for X = 1.
2. Use this author’s “combine rule” to produce a single expression.
The rule for combining expressions derived separately for X = 0 and X = 1 is X’•(expression for X= 0) + X•(expression for X = 1).
The origin of the combination rule is the following observation. Consider the Boolean expression F = X’•A +
X•B, where A and B are any Boolean expressions.
When X = 0, this becomes F = 1•A + 0•B = A, and
when X = 1, this becomes F = 0•A + 1•B = B.
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We then see that F = X’•A + X•B if and only if F = A when X = 0 and F = B when X = 1. This simple observation is the source of the combination rule. It will always produce a correct result and usually produce the simplest result.
There are quite a few simplifications of the combine rule, all of which should be noted.
1. A = B. Then F = X’•A + X•A = A
The last two statements seem somewhat surprising, so we prove them.
a) X’ + X•B = X’ + B
So we get to work with the combine rule.
The table for flip-flop 1 is as follows.
simple variables matched, but we noted that Y0’ matched both.
We now apply the combine rule: X’•(expression for X= 0) + X•(expression for X = 1).
For X = 0 J1 = Y0 and for X = 1 J1 = Y0’, so J1 = X’•Y0 + X•Y0’ = X Y0. For X = 0 K1 = Y0 and for X = 1 K1 = Y0’, so K1 = X’•Y0 + X•Y0’ = X Y0.
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The table for flip-flop 0 is as follows.
X = 0 X = 1
Y1Y0 Y0 J0 K0 Y1 J0 K0
0 0 1 1 d 1 1 d
0 1 0 d 1 0 d 1
1 0 1 1 d 1 1 d
1 1 0 d 1 0 d 1
J0 = 1 J0 = 1 K0 = 1 K0 = 1
We now apply the combine rule: X’•(expression for X= 0) + X•(expression for X = 1).
This is easy. J0 = X’•1 + X•1 = X’ + X = 1 This is easy. K0 = X’•1 + X•1 = X’ + X = 1
Step 9 Summarize the equations by writing them in one place.
Here they are.
J1 = X Y0 K1 = X Y0
J0 = 1 K0 = 1
This is a counter, so there is no Z output.
Step 10 Draw the circuit diagram.
Again, we note that both flip-flops have J = K, so we can replace each by a T flip-flop.
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Several other obvious solutions exist for the up-down counter, including one that is a copy of the one-hot solution in which the X input controls the shift direction: X = 0 for shift right and X = 1 for shift left. Students are invited to examine these solutions at their leisure.
The Prize Problem
For several semesters I have had a prize problem that nobody (including myself) can solve. The goal of the problem is to demonstrate at least one instance in which the combine rule does not produce the simplest solution. Here is the problem.
Do a design with one or more JK flip-flops (note – one should be enough). Use the methods of these notes – least complexity search and combine rule – to produce a solution for J and K. Demonstrate a method that produces simpler Boolean expressions for J and K. Any student who wants to attempt the problem is advised to consult with me before undertaking this problem to avoid wasting time in solving the wrong problem.
The Traffic Light Problem
As a more complex digital design problem, we shall consider the controller for a simple traffic light. The light is at the intersection of two roads, one (NS) running North-South and one (EW) running East-West. The light should be considered as two coupled traffic lights, one called L1 and the other L2. Each of the lights (or pairs of lights) displays the standard sequence: Red, Green, Yellow. More complex traffic lights, such as those with turn signals or advanced green lights, can be similarly modeled – but let’s keep it simple.
We see that there are six states in the system. In line with standard binary notation, I begin the labeling with state 0. It will be convenient to have state 0 be a Red-Red state, Thus:
Before continuing with the design, we note that there are two states, 0 and 3, with the alias RR. We use this fact to comment on an alternate design, one which I decline to use.
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At first look, the design on the right appears simpler, only having five states. The diagram at right hides one specific difficulty – the state that follows RR. Is it GR or RG? The design at right calls for the transition RR =>
RG to alternate with the transition RR => GR; thus we would need a flip-flop to remember which transition was taken last time. Each of the two designs requires at least three flip-flops. We go with the easier design on the left.
At this point, we complete step 1 of our design process by deriving the state table for the circuit. Note that the circuit does not have any input labeled X – the only input is the clock.
The table at right is the state table, with the state number and alias given for both the present and next state. We keep the alias for convenience only as we have not resolved the duplicate “RR” alias. At this point, we note that we have six states and are ready for Step 2: Count the Flip-Flops.
We need to use three flip-flops; P = 3.
Step 3: Assign a Binary Number to Each State
The solution here is obvious – we treat each number as a three-bit unsigned integer and assign the binary numbers 000, 001, 010, 011, 100, and 101. At this point, we have two binary patterns that are not assigned 110 (state 6) and 111 (state 7). Although these states are supposedly unreachable in our design, I propose to handle them anyway as we are designing a device that is safety-critical. This design specifies that the next state following either state 6 or state 7 will be state 0. As a safety consideration, we further specify that both states 6 and state 7 display Red on each of the two lights as we consider these to be failure states.
Following our standard design practice, we label the flip-flops with the integers 2, 1, and 0, and call the outputs of the flip-flops Q2, Q1, and Q0, as Y is taken to stand for Yellow.
Step 4: Derive the State Transition Table and Output Table.
The first step in deriving the output table is to define the output. The design calls for two coupled traffic lights, each with the standard colors Red, Green, and Yellow. The circuit will thus have six outputs R1, G1,
Present State Next State
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Y1, R2, G2, and Y2 – the first three outputs to light 1 and the second three outputs to light 2. The output table is somewhat complicated.
It may seem that we have six signals to generate based on the three binary values Y2, Y1, and Y0, but we take a short-cut. We note that each light is either Red, Green, or Yellow, and when it is not either Green or Yellow it must be Red. Thus, the only signals we generate directly are G1, Y1, G2, and Y2.
A bit of reflection will show that, even with this design, it is possible for one light to show more than one color. Here we assume a person seeing both red and green on a traffic light would assume something is very wrong.
We now consider the state transition table expressed in terms of Q2, Q1, and Q0.
Before breaking this into three tables, one for each flip-flop, we note the handling of the supposedly non-reachable states 6 and 7. The design here is based on fault tolerance, the idea that the circuit should have some ability to restore itself from faulty operation.
Step 5: Separate the Table into Three Tables, One for Each Flip-Flop
Remember that each table must have a complete description of the present state.
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Step 6 – Select the Flip-Flop Type and Copy Its Excitation Table Since the JK flip-flops seem to be the Q(t) Q(t + 1) J K
Step 7 – Derive the Input Table for Each Flip-Flop
Step 8 – Derive the Input Equation for Each Flip-Flop
J2 = Q1• Q0 J1 = Q2’ • Q0 J0 = Q2’ + Q1’
K2 = Q1 + Q0 K1 = Q2 + Q0 K0 = 1
Step 9 – Summarize the Equations
Not needed – there are no other equations.
Step 10 – Draw the Circuit
The circuit is shown on the next page of the notes. The diagram has three parts.
1) The middle part is the design from steps 8 and 9 of the above work. It shows the design of what is essentially a modulo-6 counter.
2) The top part contains the circuits that implement the equations for R1, Y1, G1, etc. as found in the first part of step 4 of the design. This is essentially the output of the circuit – six signals
that control six traffic lights.
3) The bottom part of the circuit is what provides clock pulses to the modulo-6 counter.
Note that the circuit is a shift register used to provide a clock pulse at irregular intervals: at T = 1, T = 6, and T = 8, providing for unequal length of light phases.
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In this design, the input CLOCK is a regular signal, say one tick per second. The shift register at the bottom of the diagram shifts a single 1 around in a circular pattern, causing an output at T = 1, T = 6, and T = 8 (or 0). It is this irregular output that causes the modulo-6 counter in the middle of the diagram to move to the next state. We postulate that the circuit begins in state 0 (RR) and moves as follows.
State Alias Duration Ends at
0 RR 1 T = 1
1 RG 5 T = 6
2 RY 2 T = 8 (T = 0)
3 RR 1 T = 1
4 GR 5 T = 6
5 YR 3 T = 8 (T = 0)
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f) A readable diagram for this circuit.
2. Extend the above circuit to produce three outputs Z0, Z1, Z2, exactly one of which is active (high) at any given clock pulse.
3. Use three D flip-flops in a shift-register configuration to produce the modulo-3 counter.
Include a start signal (START) that sets the circuit to state 0, so Z0 = 1.
4. The following is a state transition table for a two-flip-flop circuit with two inputs X1 and X0. Design the circuit represented by this transition table, using two JK flip-flops.
d) A readable design for this circuit.
5. The following is a state table for a circuit of interest.
Complete the design of this circuit, making the state vector assignments A = 00, B = 01, C = 10, and D = 11. Show the output table and output equation, as well as the input tables and equations for each of the two flip-flops. Draw the circuit.
You may use either JK or D flip-flops.
Algorithm state Machines.:
Every digital system can be partitioned into two parts. Those are data path (digital) circuits and control circuits. Data path circuits perform the functions such as storing of binary information
Present State Next State / OutputX = 0 X = 1
A A/0 B/0
B A/0 C/0
C A/0 D/0
D A/1 D/0