Design of L-type PV-DSTATCOM

For the realization of any system, it is very essential to develop the model analogous to its ideal characteristics. So under this section the modeling of photovoltaic (PV) system and the DSTATCOM is described elaborately.

2.2.1 Modeling of PV system

As the incident of solar radiation produces a current, the PV cells are considered as current source. To understand the electronic behavior of a solar cell it is useful to create a

19

model which is electrically equivalent. An ideal solar cell may be modeled by a current source in parallel with a diode. The basic equation that mathematically describes the I-V characteristics of the ideal photovoltaic cell is

𝐼 = 𝐼_{𝑝ℎ,𝑐𝑒𝑙𝑙}− 𝐼_{0,𝑐𝑒𝑙𝑙}[𝑒𝑥𝑝 (𝑞𝑉𝑑

𝑎𝐾𝑇) − 1] (2.1)

where 𝐼_{𝑝ℎ,𝑐𝑒𝑙𝑙} is the current generated by the incident light (directly proportional to the solar irradiation), 𝐼_𝑑 is the current flowing through Shockley diode (𝐼_𝑑 = 𝐼_{0,𝑐𝑒𝑙𝑙}(𝑒𝑞𝑉𝑑⁄𝑎𝐾𝑇 _{− 1)), 𝐾 is the Boltzmann constant [1.3806503*10}−23_{J/K], q is the electron}

charge [1.60217646*10−19C], T [K] is the temperature of the p-n junction, a is the diode ideality constant.

In practice no solar cell is ideal, so a shunt resistance and a series resistance component are added to the model. After adding the resistances, the equivalent circuit diagram of a practical photovoltaic cell is shown in Fig. 2.2.

I

I

R

R

V

I

Fig. 2.2 Equivalent circuit of a practical photovoltaic device.

From the above equivalent circuit diagram, the current produced by a solar cell is expressed as

𝐼 = 𝐼_𝑝ℎ− 𝐼_𝑑− 𝐼_𝑠ℎ (2.2)

The current flowing through the elements are governed by the voltage across them

𝑉_𝑑 = 𝑉 + 𝐼𝑅_𝑠 (2.3)

where V is the voltage across the output terminal, I is the output current and Rs is the series resistance.

20 𝐼_𝑠ℎ = 𝑉𝑑

𝑅_𝑠ℎ (2.4)

Now substituting(2.1), (2.3) and (2.4) in(2.2),

𝐼 = 𝐼_{𝑝ℎ,𝑐𝑒𝑙𝑙}− 𝐼_{0,𝑐𝑒𝑙𝑙}(𝑒𝑞(𝑉+𝑅𝑠𝐼) 𝑎𝐾𝑇⁄ _{− 1) −}𝑉 + 𝑅𝑠𝐼

𝑅_𝑠ℎ (2.5)

The above equation is applicable for single cell. But in practical a PV array consist of several cells. By considering the array consist of 𝑁_𝑠 number of cells, for one module or one panel (2.5) can be written as

𝐼 = 𝐼𝑝ℎ− 𝐼0[𝑒𝑥𝑝 ( 𝑉 + 𝐼𝑅_𝑠 𝑉𝑡𝑎 ) − 1] −𝑉 + 𝑅𝑠𝐼 𝑅𝑠ℎ (2.6) where 𝑉_𝑡= 𝑁_𝑠𝐾𝑇 𝑞⁄ is the thermal voltage of the array

The solar cells are connected in parallel to increase current and in series to provide greater output voltage. So the equation (2.6) for one photovoltaic array can be written as

𝑰 = 𝑵_𝒑𝒑𝑰_𝒑𝒉− 𝑵_𝒑𝒑𝑰_𝟎[𝒆𝒙𝒑 ( 𝑽 + 𝑰𝑹_𝒔(_𝑵𝑵𝒔𝒔 𝒑𝒑) 𝑽_𝒕𝒂𝑵_𝒔𝒔 ) − 𝟏] − 𝑽 + 𝑹_𝒔𝑰 (_𝑵𝑵𝒔𝒔 𝒑𝒑) 𝑹𝒔𝒉(_𝑵𝑵𝒔𝒔 𝒑𝒑)

where 𝑁𝑠𝑠 is the solar module connected in series and 𝑁𝑝𝑝 is the solar module connected in parallel.

The generated current of the photovoltaic cell depends linearly on the solar irradiation and is also influenced by the temperature according to the following equation:

𝐼𝑝ℎ = (𝐼𝑝ℎ,𝑛+ 𝐾𝐼∆𝑇) 𝐺 𝐺𝑛

(2.7)

where 𝐼_𝑝ℎ,𝑛[A] is the photo-generated current at the nominal condition (generally 250C and 1000W/m2), ∆_𝑇= 𝑇 − 𝑇_𝑛[K] (being T and 𝑇_𝑛 the actual and nominal temperature), 𝐺[W/m2_{] is the irradiation on the device surface, and the 𝐺}

𝑛 is the nominal irradiation. The diode saturation current 𝐼₀ and its dependence on the temperature may be expressed as: 𝐼₀ = 𝐼_0,𝑛(𝑇𝑛 𝑇) 3 𝑒𝑥𝑝 [𝑞𝐸𝑔 𝑎𝐾 ( 1 𝑇𝑛 −1 𝑇)] (2.8)

where 𝐸_𝑔 is the bandgap energy of the semiconductor [≈1.12eV for polycrystalline Si at 250_{C] and 𝐼}

21 𝐼0,𝑛 = 𝐼_{𝑠𝑐,𝑛} 𝑒𝑥𝑝 (_𝑎𝑉𝑉𝑜𝑐,𝑛 𝑡,𝑛) − 1 (2.9)

where 𝐼_{𝑠𝑐,𝑛} is the nominal short circuit current, 𝑉_{𝑜𝑐,𝑛} is the nominal open circuit voltage, 𝑉_𝑡,𝑛is the thermal voltage of 𝑁_𝑠 series connected cells at the nominal temperature 𝑇_𝑛. Now the photovoltaic model can be improved by the following expression:

𝐼₀ = 𝐼𝑠𝑐,𝑛+ 𝐾𝐼∆𝑇 𝑒𝑥𝑝 (𝑉𝑜𝑐,𝑛_𝑎𝑉+ 𝐾𝑉∆𝑇

𝑡 ) − 1

(2.10)

where 𝐾𝐼 is current temperature coefficient, 𝐾𝑉 is the voltage temperature coefficient.

2.2.2 Design of L-type DSTATCOM

For proper functioning of DSTATCOM, the parameters such as the capacitance of dc link, the voltage across dc bus and the value of ac interfacing filter must be chosen carefully. So under this subsection the function and selection criteria of these parameters are described. The design of these components is based on the following assumptions:

 The grid voltage is sinusoidal.

 The AC side line current distortion is assumed to be 5% [70] for designing. But when distortion is more than 5%, there would be an increase of interruption in injecting compensating current.

 There is fixed capability of reactive power compensation of the active filter.

 The PWM converter is assumed to operate in the linear modulation mode (i.e. 0 ≤ M ≤ 1), where M is the amplitude modulation factor.

2.2.2.1 Design of DC capacitor voltage

Thedc bus capacitor serves two main purposes

 It maintains a dc voltage with small ripple in steady state

 Serves as an energy storage element to supply real power difference between load and source during the transient period

In steady state, the real power supplied by source should be equal to the real power demand of the load plus a small power to compensate the losses in the active filter. Thus, the dc capacitor voltage can be maintained at a reference value. However, when the load condition changes the real power balance get disturbed between source and load. This real power difference is to be compensated by the dc capacitor.

22

A smaller dc capacitor voltage than the reference voltage means that the real power supplied by the source is not enough to supply the load demand. Similarly, a larger dc capacitor voltage than the reference voltage means the source is suppling more real power to load than the load demand. So, the reference value of the dc bus voltage for the voltage source inverter can be defined as:

𝑉_𝑝𝑣 = 2√2𝑉𝐿𝐿 √3𝑚

(2.11) where 𝑉_𝐿𝐿 is the source line to line voltage, m is the modulation index (often chosen as 1). 2.2.2.2 Design of DC bus capacitor

The value of dc capacitor (𝐶𝑑𝑐) of VSC based DSTATCOM depend on the instantaneous energy available to the DSTATCOM during transients. The dc capacitor is calculated as follows [71]: 1 2𝐶𝑑𝑐[(𝑉𝑝𝑣) 2 − (𝑉𝑝𝑣1) 2 ] = 3𝑉(𝛼𝐼)𝑡 (2.12)

where 𝑉𝑝𝑣 is the reference dc bus voltage, 𝑉𝑝𝑣1 is the minimum voltage level of dc bus voltage, 𝑉 is the phase voltage of source, 𝐼 is phase current of source, 𝛼 is overloading factor (in general taken as 1.2), 𝑡 is the time by which dc bus voltage is to be recovered. 2.2.2.3 Design of passive ac interfacing inductor

The passive L-type ac interfacing inductor acts as the link between the filter and system. A PV-DSTATCOM delivers its current through the inductor. For controllability of the DSTATCOM, this inductor should not be large. On the other hand, 𝐿_𝑓 as a first order passive filter, prevents switching frequency, which is generated by the inverter. Based on this feature, 𝐿𝑓 should not be small. Therefore a compromise should be made to find an appropriate value of 𝐿_𝑓. The value of the ac interfacing inductor can be determined by following expression [71]:

𝐿𝑓 =

√3𝑚𝑉𝑝𝑣

12𝛼𝑓_𝑠𝑖_{𝑐𝑟(𝑝−𝑝)} (2.13)

where m is the modulation index, 𝑉_𝑝𝑣 is the reference dc bus voltage, 𝑓_𝑠 is the switching frequency, 𝑖𝑐𝑟(𝑝−𝑝) is current ripple (generally below 5% taken).

23