capable of dual-mode operation. It also provides a wide range of timings (up to 9999 states) in seconds or minutes,
DIGITAL ON-OFF TIMER
BIJUKUMAR J.
ranging from both the On and Off pe- riod control of the relay.
The circuit consists of eight ICs, a set of four thumbwheel switches and six logic indicators. Automatic loading
turns ‘on’ and ‘off’ alternately, with equal periods as in the case of an astable multivibrator. A four-stage display is replaced by five logic indicators, which is another advantage of this circuit.
The four 74190 presettable decade up-down counter ICs are the heart of the circuit. IC 74190 is more suitable for developing timer circuits. It has four data input pins labelled A, B, C and D and four output data pins labelled QA, QB, QC and QD. Its pin 11 is used to set
the input data into the output. When a low pulse is applied to this pin, the data at the input pins is transferred to the output pins, i.e. QD, QC, QB, and
QA become D, C, B, and A. This opera- tion has a priority over others and is done independently in all the cases. This has an ENABLE pin 4. To operate the counter, this pin is connected at low level.
When the pin goes to a high level, the IC stops counting and disables all the operations except load operation.
To set the counters in the count- down mode, keep the up/down input pin high or open. This pin is labelled Down/Up and is pin 5. The clock is applied to pin 14. QD is taken as the
clock output.
This also has two outputs, which indicate the conditions of outputs QD, QC, QB, and QA. When the counter
output reaches 0000 in the count- down mode and also 1001 in the countup mode, the maximum/minimum pin 12 goes to the high level. Hence, in this system, the data output is used to identify the maximum and minimum count states of the counter outputs. When the output of any counter reaches 0000, its pin 12 goes to a high level.
IC 7408 contains four two-input AND gates. Three gates are connected to get a four-input AND gate. The fourth
gate is used for ANDing the load pulse, which is given from power on the reset switch and output of four-input NAND
gate.
IC 74LS00 contains four two-input NANDgates. Two gates of this IC are used as inverters. One of these inverters is connected at the output of the four- input AND gate and results in a four- input NAND gate configuration. The second inverter is used to invert a low pulse given by power-on reset switch when power is on. This single high pulse is used to clear the subcounter IC 7493.
IC 7493 is also a subcounter which is used in the timer unit to drive the relay transistor. The QA output is used for this purpose. The QB output is
used to operate the presettable counters. This output is connected to ‘enable’ input of all presettable counters. Hence, whenever a high appears in the QB out-
put, the counters stop counting opera- tions and remain in disable state. This sub-counter is cleared by applying a single high pulse while power is on.
A low pulse of time duration above 1 ms is generated when the power is on. The electrolytic capacitor C1 charges through the resistor R10. After maximum charging, the output is held in high state, but initially no charge condition produces a low pulse. To get the desired result, a resis- tor of one-kilohm and 10μF capacitor is used.
Thumbwheel switches are used to give the desired time to the counters. The thumbwheel switches have one in- put terminal and four output BCD lines. The actual method to select the desired BCD code using thumbwheel switches is to connect the input terminal to the output when high output is required. To get this result, connect VCC supply
to input terminal and connect 16 resis- tors from each output of four thumb- wheel switches to the ground. The out- put data is taken from the BCD out- puts.
In the connection arrangement de- scribed above, whenever we need a high data, the connection occurs, and hence the voltage across the resistor is +5V. But for a low pulse, no connection oc- curs, and hence there is no source cur- rent. So, the above arrangement gives ground through the resistor.
After arranging the desired On time in thumbwheel switches, press the power-on switch. The power is given to the timer unit and the common cir- cuits. The load pulse applied to the counters is done in two ways. Due to low detecting operation, an AND gate is used. Pin 12 of all counters is con- nected to the four inputs of the four- input NAND gate. This gate is realised by using three two-input AND gates and an inverter.
Whenever the output of all the counters becomes 0000, pin 12 of all counters goes to a high level. Hence, the output of NAND gate becomes low. This output is always connected to the
clock input of the subcounter IC 7493 to count a single pulse after the first programed time in the counter. In this way, the first programed time in all the counter outputs becomes 0000 and a low pulse acts at output of NAND gate. The subcounter counts up a single pulse, and hence its output becomes 0001. The relay is turned on at this time.
The output of NAND gate and inte- grator output are ANDed using a two- input AND gate and the resulting out- put connected to load inputs of all counters. Due to this arrangement, af- ter the operation for first programed time completes, an automatic loading is done, and hence the second time or Off time is automatically loaded into the counters.
After automatic loading of Off time, the clock runs and the output becomes countdown with the clock. In this way, after the second programed time, another low pulse appears at the NAND gate output. This results in next loading and single pulse counting by the sub-counter. Hence, its output becomes 0010. At this time, the relay turns off due to low level in QA and
a high pulse in the QB results in a hold state of the system operation. Then all presettable counters stop counting, and hence all counter and subcounter ICs’ output states remain in the above state. Due to this reason, after the On time, the relay works and then after the Off time, the relay turns off. Hence, the system automatically remains in the disabled state.
The clock generator unit is used to give one-second and one-minute pulses for the operation of the timer. It is wired around a CMOS IC CD 4060, due to its advantages over all other clock generators. It contains an oscillator section and a divide by 214 counter. The oscillator section
produces high frequency clock and then the counter section divides it to suitable one-second and one-minute periods. The basic clock has a time period of 2.2 RC seconds, and hence the final output has a much larger time period of 2.2 RC x 214 sec-
onds. Due to the smaller values of the capacitor and resistor used, the stability of the clock period becomes constant.
T
he circuit shown in the figure is designed to operate wipers fitted in vehicles. These are special types of wipers that turn on automatically when it begins to rain and turn off when the rain stops.The circuit is based on the versa- tile, multipurpose timer chip 555. The timer 555 is used in the monostable mode in the circuit. The timer is trig- gered when a voltage below 1/3 Vcc is applied at its trigger pin. The sensor is connected between the trigger pin and ground.
The circuit can also be turned on or off, using switch S1. As the sensor de- tects rain, the wiper starts operating.