Data transfers inside the MCU are implemented by the method of direct memory access (DMA). A direct memory access has a hardware trigger, e.g. a PWM unit. When the corresponding trigger is received, data is transferred from a source address to a destination address in a so called major loop. Start-addresses and stop addresses may be configured with an increment for each trigger event. This means, after each iteration, the source or the destination address can be increased by a fixed integer.
A so called minor loop allows to execute several data transfers, e.g. multiple bytes, within one trigger event. A major loop, as illustrated in Figure 100, requires a trigger event to execute the minor loop. After the major loop is completed, the DMA can be optionally halted. Also an interrupt can be generated in which the acquired data can be processed.
The DMA operates completely without CPU intervention. The DMA shares the same data bus as the MCU. Thus, one CPU clock cycle is required for the transfer. The DMA therefore waits until the CPU does not require the memory bus. Hence, for data transfers no CPU processing time is required. Generally speaking, the following generalized acquisition structure, illustrated in Figure 101, can be observed. Data is acquired repetitively by the responsible unit, e.g. an ADC. Each measurement result is transferred to SRAM. After a specific number of transfers, an interrupt service routine (ISR) is triggered. Within the ISR data is processed by the processors hardware: Typically the acquired values
13.2 Direct-memory-access for Data Acquisitions 13 SOFTWARE ENGINEERING DMA request DMA request DMA request Minor Loop Minor Loop Minor Loop Major Loop
Figure 100: DMA acquisition structure: The data is acquired automatically by the responsible unit. Each data-element is transferred to SRAM by the DMA. After a specific number of transfers an interrupt is issued and the data is processed.
Minor Loop executed Device opertaion completed
DMA trigger Major loop completed Interrupt ag risen Interrupt service routine Interrupt request Major loop iterrations left
Figure 101: Data transfer flow from acquisition units, e.g. ADCs, is illustrated: When a device operation is complete its data is transferred within the minor loop. When the major loop is completed after several transfers, a interrupt flag is risen. The CPU can perform its calculations based on the acquired data in the interrupt service routine.
13.2 Direct-memory-access for Data Acquisitions 13 SOFTWARE ENGINEERING
are integers that are scaled in software to human-readable floating point variables. A downstream plausibility check ensures that only valid numbers are used for the subsequent control. An obvious non-plausible result, e.g. a negative output voltage, would trigger the software protection, discussed in section 10.3.
13.2.1 ADC DMA Data Acquisition
The used MCU, MKE14F256 from NXP, integrates three simultaneous operating ADCs [120]. They can be configured to work at up to 1 Mega-Samples-per-Second (MSpS). Thus, a significant amount of data, 2 MByte/sec must be transferred from each ADC to the memory. When an ADC conversion is completed, the DMA transfers the acquired result from the result register to the SRAM. As only 16 Bits must be transferred, the minor loop requires only one iteration. The major loop, specifies how many samples are acquired until an interrupt is triggered. Assuming an ADC conversion rate of 1 MSpS and a major loop of 10, the interrupt is triggered at a rate of 100kHz. In the interrupt service routine the ADC conversion result is converted to a human-readable floating point value. The ADC itself can also raise an interrupt flag. This is used in the software to trigger a CPU conversion interrupt routine. For example this can be used to convert the measurement value of the grid voltage to a float value instantaneously.
As seen in the equation (8.3) and (8.6), two major primary side results must be measured conti- nuously: The DC Link voltage Udc and the momentary AC voltage Uac. The output voltage on the
secondary side, Uout, is measured isolated and is covered in the next section.
13.2.2 External SPI DATA Acquisition
The secondary side voltage must be measured isolated, as primary side and secondary side must be galvanically isolated. For this propose, digital signals are isolated, as discussed in section 9.5.2 on page 128. The DMA continuously requests data from the secondary side ADC over the Serial Peripheral Interface (SPI) interface. After twenty data samples have been acquired, data is averaged, converted to the human-readable form and then passed to the control loop.
The SPI acquisition routine is configured to request data of two values repetitively: The DC output voltage Uouton one channel and the DC output current Iout on the other channel. The SPI acquisition
procedure is shown in Figure 102. The acquisition channel is selected by the corresponding MOSI line. The MOSI line is connected to the acquisition select line of the ADC. The sampling starts by pulling the chip select CS line low. The ADC is clocked by the CLK line and transmits the conversion results back to the MCU using the MISO line. The first DMA channel repetitively puts these two consecutive requests to the transmit buffer of the SPI unit. The received data is copied by a second
13.3 Buffered Data Writes for PWM 13 SOFTWARE ENGINEERING