Enhanced Version

The time and memory requirements of the complete algorithm proposed in the previous subsection depend on the total number of possible configurations in the network. In general, with n configuration bits (one or more for every reconfigurable module), there are 2ⁿconfigurations. In this section, an heuristic strategy able to reduce the search space is proposed. This goal is achieved by reducing the list of admitted (i.e., considered by the search algorithm) network configurations, through an analysis of the network topology. The strategy is composed of two phases. In the first phase, the configuration list is reduced, by applying some constraints. The collateral effect of such a reduction is that some faults may become untestable using the admitted configurations, only. Thus, the second phase consists of adding some of the removed configurations back into the configuration list up until the full network testability is guaranteed again. As a result, the optimal approach performs the minimum cost search on a reduced configuration graph, improving both run-time and memory requirements.

First Phase

The main idea behind the first phase is to remove all the configurations such that, given a certain reconfigurable module M_i:

1. M_iis not controllable, i.e., it cannot be programmed with a single configuration vector, because its configuration bits are not part of the active path;

2. M_iis not observable, i.e., it is not part of the active path, thus the effects of its faults cannot be observed.

If the above conditions are both true, M_iis forced to its reset state (i.e., it is configured to select the same segment of the network reset configuration). The same reasoning is applied for all reconfigurable modules in the network. This phase is represented as a Boolean problem. For each reconfigurable module, the above predicates are represented with controllability, observability, and reset Boolean constraints.

In the following, the procedure is explained in details. The topology graph (introduced in Section 6.2.1) is annotated with Boolean variables, according to the following procedure:

1. each vertex associated to a reconfigurable module M_iis annotated with a set of controlling variables, i.e., the configuration of the reconfigurable module controlling the segment of the network that includes the configuration bits of M_i;

2. each edge is annotated with a set of observing variables, i.e., the configuration of the reconfigurable module controlling the segment of the network associated to the edge;

3. for each reconfigurable module vertex, the outgoing edge that corresponds to the segment selected on the network reset is marked.

A controlling variable typically is equal to an observing variable of the graph.

As an example, let us consider the annotated graph reported in Fig. 6.3, which corresponds to the example network in Fig. 5.6 (the original topology graph is shown in Fig. 6.1). In this graph, Boolean variables s_{i j} are used to represent the state of each segment. The controlling variable of module ScanMux is equal to the observing variable of the egde connecting TDI to ScanMux. In the network topology, this edge is associated to the top-level segment (i.e., the segment outgoing from TDI, before the fork, and then outgoing from ScanMux up to TDO), which includes the configuration bit of ScanMux. In the same way, the modules SIB₁ and SIB₂ are controlled by the variable associated to one of the outgoing edges of ScanMux. In particular, this edge corresponds to the segment of the network that includes the configuration bits of SIB₁and SIB₂(they are referred to as SIBs with local control in [92]).

Given a reconfigurable module M_i, the following constraints are defined:

• C(M_i) is the controllability constraint. It corresponds to the logical conjunction of each controlling variable that annotates the vertex associated to M_i. A module M_i is controlled iff C(M_i) is satisfied, i.e., its configuration bits are part of the active path, thus it can be programmed with a single configuration vector.

• O(M_i) is the observability constraint. It corresponds to the logical conjunction of each observing variable associated to the segment that includes M_i. In the graph, this variable annotates the edge outgoing from the reconfigurable module that controls such a segment. A module M_iis observed iff O(M_i) is satisfied, i.e., it is part of the active path. For the modules at top level, the observability constraint is assumed to be always true (⊤).

• R(M_i) is the reset constraint. It corresponds to the logical conjunction of each observing variable of the marked outgoing edge of the vertex associated to M_i. It denotes the reset configuration of M_i.

In case of a module M_iwith local control (as defined in [92]), the constraints C(M_i) and O(M_i) are coincident. As an example, the constraints derived from the graph in Fig. 6.3, which only contains modules with local control, are the following:

C(ScanMux) = ⊤ O(ScanMux) = ⊤

C(SIB₁) = s₁₂ O(SIB₁) = s₁₂ C(SIB₂) = s₁₂ O(SIB₂) = s₁₂

From such representation we can derive a Boolean formula that has to be satisfied by all admitted configurations, as follows:

^

Mi

R(M_i) ∨C(M_i) ∨ O(M_i)

(6.4)

For the network of the graph in Fig. 6.3, the resulting Boolean formula is the following:

(s₂₂∨ s₁₂) ∧ (s₃₂∨ s₁₂) (6.5)

Second Phase

For each configuration, the list of testable faults can be identified. Hence, the undetected faults of the admitted configuration list (i.e., the subset of configurations satisfying Eq. (6.4)) can be derived. Each escaping fault can be either untestable (by any possible configuration) or testable by some configuration not satisfying the Boolean formula. For each of such faults, an iterative process starts from the reconfigurable module affected by the fault, and at each iteration relaxes the constraints on the modules in the controlled segment (each fault on a reconfigurable module can be associated to a controlled segment). The process stops when either the fault becomes testable or is proved to be untestable. If the fault is untestable, the original constraints are resumed.

TDO

Fig. 6.3 Topology graph of the example network in Fig. 5.6 annotated for heuristic optimiza-tion.

In the previous example of the graph in Fig. 6.3, as already discussed in Sec-tion 6.1.2, the fault that forces the ScanMux to always select the segment connected to input 1 (see Fig. 5.6) can be detected only by a subset of configurations in which the ScanMux is part of the active path. In particular, according to Table 6.1, the configuration in which the ScanMux selects the segment connected to input 0 (i.e., the segment which excites the fault) and the modules SIB₁and SIB₂are de-asserted creates a faulty path with the same length of the active path (see Table 5.1). Thus, this configuration is not able to detect the fault, while all others are. Since SIB₁and SIB₂are neither controllable nor observable in such a configuration of the ScanMux, they are constrained to their reset configurations by the Boolean formula. In order to make such a fault detectable, an iterative process is started. By relaxing the constraint that forces SIB₁to its reset state, an admitted configuration in which the active path and the faulty path have different length is found (configuration 0,A,D in the table).

The formula becomes the following:

s₃₂∨ s₁₂ (6.6)

After the application of the heuristic optimization on the example network, the optimal approach based on A^∗ uses a graph composed of 12 vertices only (6 for configuration and 6 for test) instead of 16. The optimal solution is not compromised and the test sequence found by the algorithm is the same.