Note
Error
ClickIC6 and IC9 are overlapped in the lesson on the preceding page, but the error mark is not displayed. In this status, execute Component DRC.
1. Check View Comp. DRC Errors.
2. Execute Component DRC
Select Check Æ Component DRC from the menu bar.
Click Check All Area in panel menu.
The error mark is displayed.
3. Check the location of the errors.
Click DRC Settings in panel menu.
Click Error List.
Error list dialogue is displayed.
Lesson Caution ！ Click Click Click Click
4. Zoom the error location.
Click Error Type: Comp. - Comp. Cell.
The clicked component will be zoomed.
5. Return the component to the original position.
If the error has been corrected, the error message is deleted from the error list.
Click Close.
6. Return the DRC to its original setting. Click
Components using the same footprint (the same shape) can be swapped on the board. Because the reduction rate is displayed by calculating the estimated wiring length before and after swapping, the components can be swapped by using this reduction rate as a criterion.
Swap six components, IC6 through IC11, so that the estimated wiring length is minimized. 1. Select Edit Æ Swap Components from the menu bar.
2. Click one of the components to be swapped. Click IC11 in this example.
A flag mark is displayed on the canvas indicating the component that can be swapped.
The footprint name and a list of the components to be swapped are displayed on the panel menu.
3. Next, click IC9.
The value of the estimated wiring length will be displayed on the panel menu.
If the reduction rate on the panel menu is less than 100%, the estimated wiring length is reduced.
4. Click Apply in panel menu.
IC11 and IC9 will be swapped.
By setting Same Footprint Only on the panel menu to OFF, components can be swapped regardless of shape. To swap
z Swapping Component Positions
Menu bar Edit Æ
Swap Components
Swapping placement positions of IC9 and IC11
Lesson
Note
Click
Click
The same gates can be swapped just as with the Swap Components command.
You must define in advance that the components can be swapped (pin assignment information).
Swap the gates for IC9.
1. Select Edit Æ Swap Gates from the menu bar.
2. Click one of the gates to be swapped. Click Pin 1 (upper right) in IC9.
On the canvas, a balloon mark is displayed on Pins 1 through 3 (selected gate), and a flag mark is displayed on the pins of the gate that can be swapped.
The selected gate name and a list of the gates that can be swapped will be displayed on the panel menu.
3. Click one of the gates that can be swapped. Click Pin 4 in IC9.
Information before and after swapping will be displayed at the location of the estimated wiring length on the panel menu.
4. Click Apply in panel menu.
Gates 1 and 2 of IC9 will be swapped and the nets connected to these gates will also be swapped.
z Swapping Gates
Menu bar
Edit Æ Swap Gates
Swapping Gate 1 and Gate 2 Lesson Caution ！ Click Click Click
If there are swappable pins in one gate, they can be swapped.
Equivalent definition must be made in advance for the pins (function information).
Swap pins for IC9. 1. Display Pin No.
Click View Æ PinNo. from menu bar to enter check mark
for PinNo..
PinNo. is displayed .
2. Select Edit Æ Swap Pins from the menu bar.
3. Click one of the pins to be swapped. Click Pin 4 in IC9.
An “x” mark will be displayed on Pin 4 and a flag mark will be displayed on the pins that can be swapped. A list of the swappable pins will be displayed in the same manner as when swapping gates.
4. Click a pin that can be swapped. Click Pin 5 in IC9.
Information before and after swapping will be displayed at the location of the estimated wiring length on the panel menu. Menu bar
Utilities Æ Swap Pins
z Swapping Pins
Swapping Pins 1 and 2 Caution ！ Lesson Click Click 1 2 1 2 Click
5. Click Apply in panel menu.
Pins 4 and 5 in IC9 will be swapped.
6. Turn off Pin No. display
Click View Æ PinNo. from menu bar to take off check mark
for PinNo.. Click
* UNDO/REDO
UNDO invalidates a command executed to an object and restores the original status; REDO executes the command again from the status.
UNDO ... Invalidates executed processing and restores the status before execution.
REDO ... Restores invalidated processing. To move component
Click .
Restores the status before moving the component.
Click .
Re-executes moving.
Information in the command stack for UNDO is cleared if the file is closed or the tool is changed (e.g., from the Floor Planner to the Placement/Wiring Tool).
The number of times UNDO can be executed is already defined in the resource file. If this number is exceeded, “Data that executes UNDO/REDO is not stacked” is displayed.
Only a command that effects an object (such as that Input, Edit, or Delete) can be invalidated by the UNDO command. Commands that do not directly manipulate objects, such as view manipulating, changing grid, request, and check commands, are not subject to UNDO.
In addition, some commands cannot be invalidated by UNDO.
By specifying a memory (where nets are arranged horizontally and vertically) in the area, the memory can be automatically wired.
1. Select Edit Æ Memory Routing from the menu bar.
2. Set Horizontal to 4 and Vertical to 1 for “Prim. Wir. Dir". in the panel menu.
3. Specify the whole board with a rectangle.
After the area has been specified, wiring is automatically started.
z Wiring Memory
Menu bar Edit Æ Memory Routing Lesson × P1 P2 × × ClickWire patterns that go through the same path are wired together as a bundle.
Specify wiring paths as a bundle. 1. Click (Input Bundle) on the tool bar.
2. Confirm each item in panel menu are set like following picture.
3. Confirm that Layer 1 is the Active Layer.
If not, select Layer 1 by using the pull-down menu.
4. There are several unconnected lines in parallel between IC1 and IC2. Sequentially click them (P1 through P8).
Specify in the vicinity of an IC1 pin.
5. Select Data End from the assist menu.
Instead of selecting Data End, Space key may be input from the keyboard.
The specified unconnected lines are bundled and wired as input lines.
z Inputting Bundle
Lesson Click Release Menu bar Edit Æ Input Bundle × × × × × × × × P1 P2 P3 P86. Specify the direction in which the wiring pattern is extracted (P9).
The lines will be bent.
7. Retract the wiring pattern to a pin. Click one of the connection destination pins (P10).
All the patterns will be wired.
* [Input Bundle] Command
The [Input Bundle] command executes the following: • Inputting signal net as a bundle
The specified unconnected lines are bundled and wired.
• Inputting temporary net as a bundle
The fixed number of bundles can be input, regardless of whether the lines of those bundles are connected or not. • Via generation during bundle input
Via can be generated during wiring (specified from the assist menu).
• Editing bundle line
Route for already routed bundle line can be changed as bundle.
• Bundle candidate display
Out of many unconnected bundles, those that can be input as a bundle are highlighted and displayed (this highlighted display is cleared when the bundle is displayed again).
P9 ×
P10
* Active Layer for the Placement/Wiring Tool
The Placement/Wiring Tool carries out editing work only on layers having layer attributes defined as conductive layers. The Active Layer determines what conductive layer a wiring pattern is to be input to.
The current Active Layer can be checked at the following two locations:
Edit-mode indicator Viewer
<<Operation to change Active Layer>> • Changing by using edit-mode indicator
Click the Active Layer display for the edit-mode indicator and select a layer to be set as the Active Layer from the list. • Changing by using viewer
Click a layer to be set as the Active Layer from the layer display bar on the Viewer. In the viewer, you can change not only Active Layer but also Visible Layer.
Click a layer to be set as the visible Layer from the layer display bar on the Viewer with Shift Key.
The Active Layer is automatically changed in the following cases:
Active Layer ... Layer 1 Active Layer … Layer 4
Even while wiring is performed on Layer 1, Layer 4 will be
automatically selected as the Active Layer if via is generated.
Active Layer ... Layer 1 Active Layer … Layer 4
Even if Layer 1 is the Active Layer, Layer 4 will be automatically selected as the Active Layer if an attempt is made to wire from a component on Side B.
Active Layer ... Layer 1 Active Layer … Layer 4
Even if Layer 1 is the Active Layer,
Click Via is generated. Click a SMD pin on Side B. Click Note
A slash line means the layer is being set as visible layer. No slash line means the layer is not being set as visible layer
Specified unconnected lines will be automatically input as a bundle.
The wiring path will be automatically determined.
Wiring will be performed only on a single layer.
If the specified unconnected line is not recognized as a bundle, wiring is not performed.
1. Click (Input Bundle) on the tool bar. 2. Set the panel menu as follows:
3. Confirm that the Active Layer is Layer 1.
If not, change the layer by referring to “* Active Layer for the Placement/Wiring Tool” on page 3-64.
4. Specify the whole board as an area.
.
5. Click Apply in panel menu.
z Executing Auto-bundle Routing
Lesson Caution ！ Click Reference Menu bar Edit Æ Input Bundle Click P1 P2 × ×
Template Routing is a function to automatically wire components in accordance with a standard pattern. To execute Template Routing, therefore, one pattern that serves as the standard must be wired in advance.
1. Set Layer 4 as the Active Layer by using the edit-mode indicator.
To change the Active Layer, refer to “* Active Layer for the Placement/Wiring Tool” on page 3-64.
2. Click (Input Routing) on the tool bar.
3. Click Pin 23 in IC2 (P1) and the following points (P2 through 6) sequentially.
4. Select (Template Routing) from the tool bar. 5. Set the mode in the panel menu as follows:
Target Unconnected Line Assign Interval Grid Interval
6. Click a pattern that is used as the standard (P1).
z Template Routing
Lesson Reference Menu bar Edit Æ Template Routing P3 P2 P5 P4 P6 P1 × × × × × × P1 ×7. Sequentially click the unconnected nets (P2 to P3) that are wired by Template Routing.
8. Select Data End from the assist menu.
Instead of Data End, Space key may also be input from the keyboard.
Release P2
×
P3 ×
* Template Routing Command
Template Routing can perform the following
Template routing following the standard pattern (Specifying an unconnected net by single select)
Template routing following the standard pattern (Specifying unconnected nets by frame select)
Partial template routing (pattern with net)
Partial template routing (pattern without net)
Template routing for area
Perform wiring by using only one layer.
Wire a pattern that connects a connector and a memory on Layer 4.
1. Click (Input Routing) on the tool bar.
2. Confirm that Layer 4 is the Active Layer by using the Viewer.
If it is not, change the Active Layer by referring to “* Active Layer for the Placement/Wiring Tool” on page 3-64.
3. Wire Pin 10 in IC4 with Pin 35 in CN1. Click P1 and P2 below in that order.
Depending on the status of the rubber band, DRC is executed in real-time, and only the patterns that can be wired are temporarily displayed.
4. Click P3 and P4 in that order.
5. Move the cursor to P5. The rubber band will change from a rectangle to a diagonal line. Click P5 when the rubber band angle has changed, and then click Pin 35 in CN1 (P6).
z Wiring on a Single Layer
Lesson Reference Note P2 P1× × P3 P4 × × P6 P5 × ×
6. Similarly, wire as follows:
To wire with an unconnected net specified, the unconnected net to be wired is displayed in light blue for emphasis when the cursor is moved near the unconnected net.
* Starting Point for Wiring Pattern Extraction
When extracting a pattern by specifying an unconnected net, the starting point is the pin closest to the clicked coordinates.
If you want to change the starting point for extraction to the pin on the opposite side after clicking coordinates, select Another from the assist menu.
* Locking Angle
When wiring, the angle can be fixed. Panel menu
Regardless of the angle set on the panel menu, you are navigated to the position at which the pin is connected in 45-degree units.
Click
Click
To wire two or more layers with a single pattern, via is generated where the layer is changed.
1. Set Layer 1 as the Active Layer.
To change the Active Layer, refer to “* Active Layer for the Placement/Wiring Tool” on page 3-64.
2. Click (Input Routing) on the tool bar.
3. Extract the pattern from Pin 16 in CN1 to the left (SIGN14).
4. Click the same place as P4 once again (P5).
Via is generated in accordance with the via layer on the panel menu.
5. Extract the pattern (P6).
Confirm that the pattern has been generated in Layer 4 (Green).
z Wiring on Multiple Layers
Via (padstack) Lesson Reference P4 P3 P2 × P1 × × × × P5 P6 ×
6. Change the Active Layer on the panel menu from Layer 4 to 1.
7. Connect the wiring pattern up to Pin 1 in IC9 (P7 and P8).
* Via Generation
Via can be generated in the following two ways:
1. Click a point that you want via to be generated at two times.
syThe Active Layer changes in
accordance with the specified via layer, and the specified FromTo via is generated. 2. Change the Active Layer.
The specified FromTo via is generated.
To generate Interstitial Via, refer to “Master Training <PCB Design>". Via is generated as soon as the Active Layer has been changed. Click Click Click Reference P7 P8 × ×
* Via Grid
The Placement/Wiring Tool can set different grid pitches for a wiring pattern and via in the middle of wiring.
• Wiring grid ….. Grid for wiring pattern
• Via grid... Grid for via that is generated in the middle of wiring Set a via grid as follows:
1. Set the pitch of the via grid.
Select Environment Æ Grid from the menu bar.
For detail, refer to [ Setting Grid ] on Page3-3. 2. Validate the via grid.
Select Environment Æ Via Grid Æ Draw-in from the menu bar.
To display via grid, select Environment Æ Via Grid Æ View from the menu bar.
Via Grid is set to Off by default. To avoid generating off-grid via, be sure to set it to On.
When Via Grid is set to Draw-in, a check is performed as to whether via is generated on the grid. If the via is not on the grid, the error message “Not on Via Grid” is displayed and via cannot be generated.
To extract a pattern from a component with no pins on the grid, extract the pattern onto the grid and then generate via.
Click
Caution ！
* Search for Unconnected/Net Zoom/Unconnected Zoom
By using the Search for Unconnected and Unconnected Zoom on the assist menu, wiring efficiency can be enhanced.
<<Unconnected Zoom>>
This command zooms the unconnected net selected.
Click an unconnected net The unconnected net selected is expanded and displayed.
<<Zoom Net>>
This command zooms the whole net selected.
During input wiring The whole net selected is displayed.
<<Search for Unconnected>>
This command searches the shortest net of the remaining unconnected nets, and expands and displays that net.
Search for Unconnected The shortest unconnected net is used for wiring input.
Unconnected net like following is not the target for "Search for Unconnected" z Unconnected net that "View" setting for the net is OFF.
z Unconnected net that "Con" setting for the net is OFF.
Example Example Example Caution ！ Click Click Click
An area can be wired as part of a pattern.
Wire Pins 1 and 2 in CN1 and Pin 1 in C1 with an area. 1. Set Layer 4 as the Active Layer.
2. Click (Input Area) on the tool bar. 3. Set the panel menu as follows:
Area Shape ... (Polygon) Outline Width ... 0.5 mm Painting Pitch ... 0.5 mm Painting Angle ... 90 Degrees Shape ... (Segment)
4. Click a pin (P1) that is the same signal as the area.
Exercise care because the Active Layer may be automatically changed depending on the pin specified. For details, refer to “* Active Layer for the Placement/Wiring Tool” on page 3-64.
5. Sequentially click the outline of the area (P2 to P7).
When an area is input, the cursor is retracted into an intersection in 45-degree units and a circular mark is displayed at
that position.
6. Select Data End from the assist menu.
z Wiring Area
Lesson Release Reference Caution ！ × P1 P2 P3 P4 P5 P6 P7 × × × × × ×If the inside layer is a negative surface, a pin of the same signal as the negative surface must be connected to the inside layer one way or another.
If the pin is via (through-hole plated), it is automatically changed to thermal land when the tool is changed to the Placement/Wiring Tool. A pin without a through attribute, such as an SMD pin, however, must be connected to the inside layer either by routing a pattern to the pin for the via or by drawing the pin out and generating via.
We will now connect the inside layer by wiring up to the pin of a component that is already connected to the inside layer.
1. Click (Input Wire) on the tool bar.
2. Click Pin 2 in C5 (P1) and sequentially click a pattern route (P2, P3, and P4).
Next, we will extract the wiring to a position where via can be input and generate via to connect to the inside layer.
1. Click (Input Wire) on the tool bar.
2. Click Pin 1 in C5 (P1), extract the pattern (P2), and generate via (P3).
3. Select Data End from the assist menu.
Thermal will be automatically generated.
Release
z Inside Layer Connection
Lesson Lesson P1 P2 P3 P4 × × × × P1 P2 P3 × ×
Here you will perform extraction on a via pin already connected to the inside layer. 1. Set Layer 1 as the Active Layer.
2. Click (Input Wire) on the tool bar.
3. Click Pin 20 in IC5 (P1), extract via (P2), and generate via (P3).
4. Select Data End from the assist menu.
5. To change the land status of a via pin already connected to the inside layer from thermal to clearance, first check in what layer the thermal connection is made. Click (Query Data) on the tool bar.
6. Set the panel menu as follows:
Object Info
Target ... Figure, Area
7. Click Pin 20 in IC5.
If a line is selected, select Next from the assist menu.
Both the pin via and extracted via are connected with the inside layer thermal. Release Lesson P1 P2, P3 × × Click
Now we can see that the inside layer is connected to Layer 3.
8. Select Layer 3 as the Active Layer.
9. Click (Edit Padstack) and click Pin 20 in IC5.
10. Select Clearance in Land Status: on the panel menu and click Apply
The land status of the pad in the Active Layer of the specified padstack will be changed to “clearance".
11. Select Fix All Layers in Thermal Attrib.: on the panel menu and click Apply.
Padstack request
Click
Click Click
* Thermal Attribute
When the Placement/Wiring Tool has been selected, signal names are checked against the inside layer and the via of the same net are automatically changed to “thermal land".
A thermal attribute specifies whether the land status for via of the same net is changed when the tool is changed, as follows:
Auto Thermal if the area is at the same potential on the power plane