• No results found

Frequency Protection

In document PCS-931 X Instruction Manual En (Page 185-198)

List of Tables

1. Operation Criterion

3.15 Frequency Protection

3.15.1 Overfrequency Protection

3.15.1.1 General Application

If the power frequency of regional rises due to the active power excess demand, overfrequency protection operates to perform generator rejection to shed part of the generators automatically according to the rising frequency so that power supply and the load are re-balanced.

3.15.1.2 Function Description

Overfrequency protection consists of the four stages (stage 1 to stage 4). When system frequency is greater than the setting [81O.f_Pkp], overfrequency protection will put into service.

In order to prevent possible maloperation of overfreqency protection in conditions of high harmonics, voltage circuit failures and so on, such blocking measures are carried out as follows:

1. Blocking in undervoltage condition

If the positive voltage U1<0.15Un, the calculation of protection is not carried out and the output relay will be blocked.

2. Frequency abnormality condition

When f<40Hz or f>65Hz, overfrequency protection will be blocked

Operation criteria of overfrequency protection is shown in the following equation.

f>[81O.OFx.f_Set] Equation 3.15-1

Where:

f is system frequency.

[81O.OFx.f_Set] is the frequency setting of stage x (x=1, 2, 3, or 4) of overfrequency protection.

3.15.1.3 Function Block Diagram

3.15.1.4 I/O Signals

Table 3.15-1 I/O signals of overfrequency protection

No. Input Signal Description

1 81O.En1 Overfrequency protection enabling input 1, it is triggered from binary input or programmable logic etc.

2 81O.En2 Overfrequency protection enabling input 2, it is triggered from binary input or programmable logic etc.

3 81O.Blk Overfrequency protection blocking input, it is triggered from binary input or programmable logic etc.

No. Output Signal Description

1 81O.OFx.On Stage x of overfrequency protection is enabled (x=1, 2, 3 or 4).

2 81O.OFx.Op Stage x of overfrequency protection operates (x=1, 2, 3 or 4).

3 81O.St Overfrequency protection starts.

3.15.1.5 Logic

Figure 3.15-1 Logic diagram of overfrequency protection (stage 1)

50ms 0ms

Figure 3.15-2 Logic diagram of overfrequency protection (stage 2)

50ms 0ms

Figure 3.15-3 Logic diagram of overfrequency protection (stage 3)

50ms 0ms

Figure 3.15-4 Logic diagram of overfrequency protection (stage 4)

SIG 81O.St1

Figure 3.15-5 Logic diagram of overfrequency protection (start)

3.15.1.6 Settings

Table 3.15-2 Settings of overfrequency protection

No. Name Range Step Unit Remark

Enabling/disabling stage 1 of overfrequency protection

Enabling/disabling stage 2 of overfrequency protection

Enabling/disabling stage 3 of overfrequency protection

overfrequency protection 0: disable

1: enable

3.15.2 Underfrequency Protection

3.15.2.1 General Application

In case of frequency decline due to lack of active power in the power system, underfrequency protection operates to shed part of the load according to the declined value of frequency to re-balance the power supply and the load.

3.15.2.2 Function Description

Underfrequency protection consists of the four stages (stage 1 to stage 4). When system frequency is smaller than the setting [81U.f_Pkp], underfrequency protection will put into service.

In order to prevent possible maloperation of underfrequency protection in conditions of high harmonics, voltage circuit failures and so on, such blocking measures are carried out as follows:

1. Blocking in undervoltage condition

If the positive voltage U1<0.15Un, the calculation of protection is not carried out and the output relay will be blocked.

2. df/dt blocking element

If -df/dt≥[81U.df/dt_Blk], the calculation of protection is not carried out and the output relay will be blocked. The blocking element will not be released automatically until the system frequency recovers to be less than the setting [81U.f_Pkp].

3. Frequency abnormality condition

When f<40Hz or f>65Hz, underfrequency protection will be blocked

Operation criteria of underfrequency protection is shown in the following equation.

f<[81U.UFx.f_Set] Equation 3.15-2

Where:

f is system frequency.

[81U.UFx.f_Set] is the frequency settings of stage x (x=1, 2, 3 or 4) of underfrequency protection.

The equation of df/dt blocking function is as follows.

df/dt≥[81U.df/dt_Blk] Equation 3.15-3

Where:

df/dt is the frequency slip speed and the time step (i.e. dt) for the calucation is equal to 5 cycle.

[81U.df/dt_Blk] is the setting of df/dt blocking underfrequency protection.

Underfrequency protection can be blocked by the frequency slip speed (df/dt). If the logic setting

[81U.UFx.En_df/dt_Blk] (x=1, 2, 3 or 4) is set as “1”, when Equation 3.15-2 and Equation 3.15-3 are met, it is decided that a fault occurred and the corresponding stage underfrequency protection is blocked at the same time for the purpose of waiting for operation of other related protection. The blocking signal will not reset until the system frequency recovers, i.e. the system frequency is greater than the setting [81U.f_Pkp]. If the logic setting is set as “0”, when Equation 3.15-2 and Equation 3.15-3 are met, the stage underfrequency protection will be released to operate.

3.15.2.3 Function Block Diagram

81U.UFx

81U.St

81U.UFx.Op 81U.En1

81U.En2

81U.Blk

81U.UFx.On

3.15.2.4 I/O Signals

Table 3.15-3 I/O signals of underfrequency protection

No. Input Signal Description

1 81U.En1 Underfrequency protection enabling input 1, it is triggered from binary input or programmable logic etc.

2 81U.En2 Underfrequency protection enabling input 2, it is triggered from binary input or programmable logic etc.

3 81U.Blk Underfrequency protection blocking input, it is triggered from binary input or programmable logic etc.

No. Output Signal Description

1 81U.UFx.On Stage x of underfrequency protection is enabled (x=1, 2, 3 or 4).

2 81U.UFx.Op Stage x of underfrequency protection operates (x=1, 2, 3 or 4).

3 81U.St Underfrequency protection starts.

3.15.2.5 Logic

SIG f<40 or f>65

&

Figure 3.15-6 Logic diagram of underfrequency protection (stag1)

&

SIG f<40 or f>65

&

Figure 3.15-7 Logic diagram of underfrequency protection (stag2)

&

SIG f<40 or f>65

&

Figure 3.15-8 Logic diagram of underfrequency protection (stag3)

&

SIG f<40 or f>65

&

Figure 3.15-9 Logic diagram of underfrequency protection (stag4)

81U.St

Figure 3.15-10 Logic diagram of underfrequency protection (start)

3.15.2.6 Settings

Table 3.15-4 Settings of underfrequency protection

No. Name Range Step Unit Remark

1 81U.f_Pkp 45.000~60.000 0.01 Hz Frequency pickup setting for

underfrequency protection

2 81U.df/dt_Blk 0.200~20.000 0.01 Hz/s Rate of frequency change for blocking underfrequency protection 3 81U.UF1.f_Set 45.000~60.000 0.001 Hz Frequency setting for stage 1 of

underfrequency protection

4 81U.UF1.t_Op 0.050~30.000 0.01 s Time delay for stage 1 of

underfrequency protection

5 81U.UF1.En 0 or 1

Enabling/disabling stage 1 of underfrequency protection

0: disable 1: enable

6 81U.UF1.En_df/dt_Blk 0 or 1

Enabling/disabling rate of frequency change to block stage 1 of

Enabling/disabling stage 2 of underfrequency protection

0: disable 1: enable

10 81U.UF2.En_df/dt_Blk 0 or 1

Enabling/disabling rate of frequency change to block stage 2 of underfrequency protection

0: disable 1: enable

11 81U.UF3.f_Set 45.000~60.000 0.001 Hz Frequency setting for stage 3 of

underfrequency protection

12 81U.UF3.t_Op 0.050~30.000 0.01 s Time delay for stage 3 of

underfrequency protection

13 81U.UF3.En 0 or 1

Enabling/disabling stage 3 of underfrequency protection

0: disable 1: enable

14 81U.UF3.En_df/dt_Blk 0 or 1

Enabling/disabling rate of frequency change to block stage 3 of

Enabling/disabling stage 4 of underfrequency protection

0: disable 1: enable

18 81U.UF4.En_df/dt_Blk 0 or 1

Enabling/disabling rate of frequency change to block stage 4 of underfrequency protection

0: disable 1: enable

3.16 Breaker Failure Protection

3.16.1 General Application

Duplicated protection configurations are usually adopted for EHV power system, but the primary equipment, circuit breaker, is not duplicated. Breaker failure protection is adopted to cater circuit breaker tripping failure.

Breaker failure protection issues a back-up trip command to trip adjacent circuit breakers in case of a tripping failure of the circuit breaker, and clears the fault as requested by the device. To utilize the protection information of faulty equipment and the electrical information of failure circuit breaker to constitute the criterion of breaker failure protection, it can ensure that the adjacent circuit breakers of failure circuit breaker are tripped with a shorter time delay, so that the affected area is minimized, and ensure stable operation of the entire power grid to prevent generators, transformers and other components from seriously damaged.

3.16.2 Function Description

The instantaneous re-tripping function, after receiving tripping signal from other device and the corresponding phase overcurrent element operating, is available and provides phase-segregated

binary output contact, which can ensure the circuit breaker is still tripped in case the secondary circuit between the device and the circuit breaker is abnormal, to avoid undesired tripping of breaker failure protection and the expansion of the affected area. Instantaneous re-tripping function does not block AR.

When both the phase-segregated tripping contact from line protection and the corresponding phase overcurrent element operate, or both the three-phase tripping contact and any phase overcurrent element operate, breaker failure protection will send three-phase tripping command to trip local circuit breaker after time delay of [50BF.t1_Op] and trip all adjacent circuit breakers after time delay of [50BF.t2_Op].

When the protection element except undervoltage element within this device operates and issues tripping signal, breaker failure protection will also be initiated.

Taking into account that the faulty current is too small for generator or transformer fault, the sensitivity of phase current element may not meet the requirements, zero-sequence current criterion and negative-sequence current criterion are provided in addition to the phase overcurrent element for breaker failure protection initiated by input signal [50BF.ExTrp3P_GT] from generator and transformer protection. They can be enabled or disabled by logic settings [50BF.En_3I0_3P]

and [50BF.En_I2_3P] respectively.

For some special fault (for example, mechanical protection or overvoltage protection operating), maybe faulty current is very small and current criterion of breaker failure protection is not met, in order to make breaker failure protection can also operate under the above situation, an input signal [50BF.ExTrp_WOI] is equipped to initiate breaker failure protection, once the input signal is energized, normally closed auxiliary contact of circuit breaker is chosen in addition to breaker failure current check to trigger breaker failure timer. The device takes current as priority with CB auxiliary contact (52b) as an option criterion for breaker failure check.

3.16.3 Function Block Diagram

50BF

50BF.Op_ReTrpA

50BF.Op_ReTrp3P 50BF.ExTrp3P_L

50BF.ExTrp3P_GT

50BF.Op_ReTrpB

50BF.Op_ReTrpC

50BF.Op_t1

50BF.Op_t2 50BF.ExTrp_WOI

50BF.ExTrpA

50BF.ExTrpB

50BF.ExTrpC

50BF.En

50BF.Blk

50BF.On

3.16.4 I/O Signals

Table 3.16-1 I/O signals of breaker failure protection

No. Input Signal Description

1 50BF.ExTrp3P_L Input signal of three-phase tripping contact from line protection

2 50BF.ExTrp3P_GT Input signal of three-phase tripping contact from generator or transformer protection

3 50BF.ExTrpA Input signal of phase-A tripping contact from external device 4 50BF.ExTrpB Input signal of phase-B tripping contact from external device 5 50BF.ExTrpC Input signal of phase-C tripping contact from external device

6 50BF.ExTrp_WOI

Input signal of three-phase tripping contact from external device. Once it is energized, normally closed auxiliary contact of circuit breaker is chosen in addition to breaker failure current check to trigger breaker failure timers.

7 50BF.En Input signal of enabling breaker failure protection

8 50BF.Blk Breaker failure protection blocking input, such as function blocking binary input.

When the input is 1, breaker failure protection is reset and time delay is cleared.

No. Output Signal Description

1 50BF.On Breaker failure protection is enabled

2 50BF.Op_ReTrpA Breaker failure protection operates to re-trip phase-A circuit breaker 3 50BF.Op_ReTrpB Breaker failure protection operates to re-trip phase-B circuit breaker 4 50BF.Op_ReTrpC Breaker failure protection operates to re-trip phase-C circuit breaker 5 50BF.Op_ReTrp3P Breaker failure protection operates to re-trip three-phase circuit breaker 6 50BF.Op_t1 Stage 1 of breaker failure protection operates

7 50BF.Op_t2 Stage 2 of breaker failure protection operates

3.16.5 Logic

EN [50BF.En_3I0_1P]

SET 3I0>[50BF.3I0_Set]

BI [50BF.ExTrpA]

SET IB>[50BF.I_Set]

BI [50BF.ExTrpC]

SET IC>[50BF.I_Set]

EN [50BF.En_ReTrp]

[50BF.t2_Op] 0ms [50BF.Op_t2]

[50BF.Op_t1]

SET IA>[50BF.I_Set]

&

[50BF.t_ReTrp] 0ms

[50BF.t_ReTrp] 0ms

[50BF.t_ReTrp] 0ms

SIG BFI_A >=1

Figure 3.16-1 Logic diagram of breaker failure protection

3.16.6 Settings

Table 3.16-2 Settings of breaker failure protection

No. Name Range Step Unit Remark

1 50BF.I_Set (0.050~30.000 )×In 0.001 A Current setting of phase current criterion for BFP

2 50BF.3I0_Set (0.050~30.000 )×In 0.001 A Current setting of zero-sequence current criterion for BFP

3 50BF.I2_Set (0.050~30.000 )×In 0.001 A

Current setting of

negative-sequence current criterion for BFP

4 50BF.t_ReTrp 0.000~10.000 0.001 s Time delay of re-tripping for BFP 5 50BF.t1_Op 0.000~10.000 0.001 s Time delay of stage 1 for BFP 6 50BF.t2_Op 0.000~10.000 0.001 s Time delay of stage 2 for BFP

7 50BF.En 0 or 1

Enabling/disabling breaker failure protection

0: disable 1: enable

8 50BF.En_ReTrp 0 or 1

Enabling/disabling re-trip function for BFP

0: disable 1: enable

9 50BF.En_3I0_1P 0 or 1

Enabling/disabling zero-sequence current criterion for BFP initiated by single-phase tripping contact 0: disable

1: enable

10 50BF.En_3I0_3P 0 or 1

Enabling/disabling zero-sequence current criterion for BFP initiated by three-phase tripping contact 0: disable

1: enable

11 50BF.En_I2_3P 0 or 1

Enabling/disabling

negative-sequence current criterion for BFP initiated by three-phase tripping contact

0: disable 1: enable

12 50BF.En_CB_Ctrl 0 or 1

Enabling/disabling breaker failure protection can be initiated by normally closed contact of circuit breaker

0: disable 1: enable

3.17 Thermal Overload Protection

In document PCS-931 X Instruction Manual En (Page 185-198)