8.1.1 WCET Guarantees and Mixed-Criticality for Loosely-Coupled Reconfigurable
Architectures
The WCET analysis and optimization of Chapters 5 to 7 focus on reconfigurable processors, i.e., architectures where the reconfigurable fabric is integrated into the pipeline of a processors (a so-called tightly-coupled archi- tecture). A tight coupling between processor and FPGA reduces communication latencies and enables readily- configured accelerators to be analyzed just like existing multi-cycle instructions during WCET analysis (see Chap- ter 5). However, the design of a tightly-coupled architecture requires considerable effort to integrate processor pipeline and reconfigurable fabric. Thus, many commercially-available architectures are loosely-coupled, i.e., processor(s) and reconfigurable fabric are separate processing devices on the same chip that are connected via a common system bus. Commercial loosely-coupled architectures are, e.g., the Xilinx Zynq or Intel (formerly Altera) SoC FPGA platforms. To achieve WCET guarantees on such architectures, communication protocols be- tween processor and reconfigurable accelerators as well as worst-case analyses need to be designed that consider the common system bus, but still allow execution time guarantees. This would enable application of the approaches presented in Chapters 5 to 7 to loosely-couples architectures and provide the basis for further research in the di- rection of mixed-criticality [19], where only a subset of tasks needs to fulfill execution time guarantees while the other tasks are executed with best effort. E.g., the Xilinx Zynq UltraScale+ couples an ARM Cortex-A53 high- performance processor and an ARM Cortex-R5 real-time processor to a reconfigurable fabric. When only real-time tasks executing on the Cortex-R5 utilize reconfigurable accelerators, it can be expected that –as a result of requiring schedulability guarantees– the overall utilization of the reconfigurable fabric will be quite low, as recent works on real-time scheduling on a loosely-coupled system have shown [16]. Allowing best-effort tasks that execute on the Cortex-A53 to also utilize reconfigurable accelerators on the shared fabric can help to raise its utilization (resulting in less wasted resources of the whole system), while guarantees are maintained for real-time tasks1.
8.1.2 Probabilistic WCET Guarantees
This thesis focused on analysis of deterministic WCET guarantees, i.e., through static analysis an execution time bound is obtained that is guaranteed to never be exceeded. As motivated in Chapters 1 and 3, the problem with this approach is that current high-performance architectures can virtually not be analyzed, because they introduce average-case performance enhancing features that lead to an explosion of possible microarchitectural states. More precisely, for many of these features, e.g., out-of-order execution [63, 90], the effects on the execution time are actually understood in principle, but modeling them analytically is only possible with simplifications that introduce so much pessimism that the results cannot be used in practice [14]. Therefore, an emerging trend in real-time sys- tems research is the analysis of probabilistic WCET (pWCET) guarantees. Instead of obtaining an absolute WCET guarantee, the aim of pWCET analysis is to obtain a probability density function that, for a given execution time, determines the probability that the execution time is exceeded. When this probability is sufficiently low (often lower than 10−15is targeted), the execution time bound that achieves this probability is considered safe, because, e.g., the probability of mechanical failures in the real-time system is several magnitudes higher. pWCET analysis exists in static and measurement-based variants. Measurement-based pWCET analysis can derive execution time guarantees from measured execution times of a task (“end-to-end” measurements), when the measurements ful- fill certain statistical properties (e.g., they need to be independent and identically distributed (i.i.d.)) that allow the application of Extreme Value Theory [41]. Extreme Value Theory can derive probability density functions that pre- cisely model the extremes from statistical data (like maximum execution time from execution time measurements). This makes measurement-based pWCET an especially promising approach, because the real-time system can be treated as a gray box (only partial knowledge of its behavior is required) such that it can potentially overcome the
8.1 Future Work
limitation of static WCET analysis, which requires the whole system behavior to be modeled in detail. However, obtaining i.i.d. measurements that allow measurement-based pWCET requires some form of randomization and it is still unclear how pWCET results can be safely used in schedulability analyses [33]. Furthermore, in systems that are analyzable for deterministic WCET guarantees, pWCET analysis does not necessarily produce better results [1]. In our future research, we will investigate the applicability of pWCET analysis on fused CPU-GPU archi- tectures (see Chapter 3) as well as reconfigurable architectures (basing on approaches presented in the previous chapters). Our aim is to enable pWCET guarantees for systems that can so far not be analyzed for execution time guarantees at all as well as to evaluate what kind of architectures are more suitable to either deterministic WCET or pWCET guarantees.