Horizontal silicon nanowires

A new approach to meet the demand of the permanent down-scaling of semiconductor devices are gate-all-around (GAA) MOSFETs [6–13]. A GAA MOSFET contains a semi-conducting nanowire (NW) which is surrounded by the gate material as illustrated schemat-ically by the example of a Si NW in Fig. 3.5.

The basic step on the way towards reproducible and controllable gate-all-around MOSFETs is the fabrication of NWs with well-defined structure and dopant distribution, as well as the understanding of their physical properties.

In cooperation with the Research Center J¨ulich, horizontal Si NWs have been prepared and investigated by means of KPFM. A comprehensive study regarding fabrication and physical analysis of the Si nanowire arrays is given in Ref. [113]. The horizontal Si NW structures have been fabricated using the top-down method. Starting material was a

Figure 3.5: Schematic view of a gate-all-around MOSFET consisting of a Si nanowire (orange) with a surrounding gate (grey). The volume of the Si nanowire surrounded by the gate electrode amounts to T_SixT_SixL_G. From Ref. [114]. (Reproduced with permission from IOP Publishing Ltd.)

22 3 EXPERIMENTAL DETAILS

Figure 3.6: Schematic cross-sectional view of the silicon-on-insulator (SOI) structure including Si pad and horizontal Si nanowires (NWs) contacted for KPFM measurements. Note that the Si pad and the Si NWs are covered by an approximately 2 nm thick native oxide layer. To short-circuit the insulating buried oxide layer for KPFM measurements, an Al contact is deposited on top and connected with the sample back contact by means of silver conductive paint.

silicon-on-insulator (SOI) structure with a sample-specific 88 nm thick Si top layer with (001)-orientation, and a 145 nm thick SiO₂buried oxide (BOX) layer below. In Fig. 3.6 the schematic cross-section of the SOI sample structure is shown. The Si substrate is lightly p-type conducting with an acceptor concentration of 1 × 10¹⁵ cm⁻³. As a consequence of the preparation process of the SOI structure, the Si top layer features a very low p-type background doping of less than 1 × 10¹⁵ cm⁻³. Note that the Si top layer is covered by a native oxide layer of approximately 2 nm thickness.

By means of electron-beam lithography (EBL) and reactive ion etching the Si top layer is patterned in 10 µm wide pad regions and arrays of nanowires with widths ranging from 10 nm to 2 µm. In Fig. 3.7 a schematic top view of the prepared Si pad and the adjacent NW arrays is illustrated. The Si NWs have an uniform length of 65 µm. The use of EBL and top-down processing provides several advantages compared to chemical vapour deposition (CVD) methods, in particular an enhanced control of the location on the sample and thus controlled alignment [113]. As a consequence, all NWs are very conform in length and width. In general, lithographically fabricated NWs are more precise and reproducible which simplifies their integration into a device architecture [113]. However, transmission electron microscopy (TEM) measurements performed in the Research Center J¨ulich indicate that the NWs have a slightly trapezoidal shape with the smaller side on top after processing.

After transferring the structures into the Si top layer, the samples have been implanted. A photo-resist implantation mask was defined by EBL in order to protect certain segments of the patterned Si top layer against implantation. For each dopant species, implantation

3.1 Semiconducting samples 23

Figure 3.7: Schematic top view of the arrays of (a) implanted and (b) unimplanted horizontal Si nanowires (NWs) of different widths ranging from 10 nm to 2 µm. The implanted Si pad and the Al contact layer are illustrated schematically. Note that the Si pad and the Si NWs are covered by an approximately 2 nm thick native oxide layer.

masks have been employed to prepare implanted [Fig. 3.7(a)] and unimplanted [Fig. 3.7(b)]

NWs, respectively. Note that the adjacent 10 µm thick Si pad is always implanted.

The samples are doped by means of ion implantation of As and B at an energy 10 keV and 2.5 keV with a dose of 2 × 10¹⁵ cm⁻² and 1 × 10¹⁵ cm⁻², respectively, and an angle of inci-dence of 7^◦. Implantation conditions were chosen such that a sufficiently thick crystalline seed layer remained after the implantation in order to obtain full recrystallization of the implanted Si top layer during annealing [113]. The implantation parameters are summa-rized in Tab. 3.2. For a first estimation of the dopant distribution in the Si top layer after implantation, SRIM calculations (Sect. 3.3.2) have been performed. With the implanta-tion parameters given in Tab. 3.2, the SRIM calculaimplanta-tions reveal a Gauss distribuimplanta-tion of As atoms with a maximum concentration of 2 × 10²¹ cm⁻³ at a mean implantation depth of approximately 13 nm [full width half maximum (FWHM) ∼= 9 nm]. For B-implantation a Gauss distribution of B atoms with a maximum concentration of 5 × 10²⁰ cm⁻³ at a mean implantation depth of approximately 13 nm (FWHM ∼= 15 nm) is calculated.

After implantation, the photo-resist implantation mask has been removed wet chemically.

Then the samples have been subjected to a rapid thermal annealing (RTA) for 5 sec at 1000 ^◦C. Athena simulations including the applied implantation and annealing conditions have been performed in the Research Center J¨ulich to obtain information about the dopant distribution. With the Athena software trajectories of implanted ions can be modeled by

24 3 EXPERIMENTAL DETAILS

Table 3.2: Implantation parameters for the preparation of B-doped and As-doped nanowire arrays. Additionally, the dopant concentration and implantation depth after annealing obtained from Athena simulations performed in the Research Center J¨ulich are given.

Implantation Athena simulations

Dopant species Energy Dose Dopant concentration Implantation depth

(kV) (cm⁻²) (cm⁻³) (nm)

B 2.5 1 × 10¹⁵ 1 × 10²⁰ 50

As 10 2 × 10¹⁵ 5 × 10²⁰ 30

means of Monte Carlo calculations in order to determine the final distribution of stopped particles [115, p. 201ff]. Additionally, diffusion of implanted ions during thermal treatment can be calculated by means of user-specifiable models based on the concepts of pair diffusion and chemical and active concentration values [115, p. 130ff]. A detailed introduction of the Athena simulation software is given in Ref. [115].

The results of the Athena simulation are listed in Tab. 3.2. It is found that both, the p-type and the n-p-type NW samples, feature a box-like dopant distribution with comparable concentration of activated dopants after implantation and RTA. However, the implantation depth along z (Fig. 3.6) differs remarkably for As and B implantation. Note that the 88 nm thick Si top layer is implanted only in the near-surface region while deeper regions remain unimplanted. For B implantation and annealing the simulated acceptor concentra-tion amounts to approximately 1 × 10²⁰ cm⁻³ in the near-surface region of the Si top layer, i.e. to a depth of approximately 50 nm. Below 50 nm, the acceptor concentration decreases steadily to approximately 1 × 10¹⁶ cm⁻³ at the bottom of the Si top layer, i.e. at a depth of 88 nm. After As implantation and annealing the simulated donor concentration amounts to 5 × 10²⁰ cm⁻³ which is reasonably constant to an implantation depth of approximately 30 nm. Below 30 nm, the As-concentration decreases to 1 × 10¹⁴ cm⁻³ at the bottom of the Si top layer at a depth of 88 nm.

For the KPFM measurements, the fabricated Si top layer has to be contacted electrically.

On well-defined positions a 200 nm thick Al contact layer has been deposited as metaliza-tion via a lift-off process on the Si top layer. To short-circuit the insulating BOX layer, the deposited Al layer has been connected to the sample back contact by means of silver conductive paint. The deposited Al layer is illustrated schematically in the cross-sectional view of the SOI structure in Fig. 3.6 and in the top view in Fig. 3.7.

The results of the KPFM measurements on the Si NW samples are presented in Sect. 6.3.