2.4 Electrical Characterization Methods
2.4.1. I–V measurements
A basic I–V sweep from zero bias to breakdown can be conducted in either forward or reverse bias. Under forward bias, all the applied voltage is dropped solely in the oxide. Thus, the obtained breakdown voltage relates to the experimental breakdown field strength (EBD) of the oxide. An I–V plot typically starts with a low-leakage regime, ending at a visible knee that is featured by a continuous upward tick of leakage thereafter. This knee correlates with the
37
onset of flat-band voltage instability and irreversible oxide degradation. Thus, the operating gate voltages for an oxide should not exceed this “safe” voltage point. Prior to the breakdown point, the leakage (IG) characteristics are often analyzed to determine the mechanisms by which carriers leak to the gate metal (e.g., via Fowler-Nordheim tunneling, trap-assisted tunneling).
Under reverse bias, it is not always straightforward to separate leakage effects of the oxide from that of the GaN layer. The breakdown voltage in reverse bias (VBR) is partitioned by the voltage drop across the oxide and GaN by the following Equation [1].
= + + 2 ! [1]
ND = net doping density tox = dielectric thickness w = depletion width
εox = oxide dielectric constant εsc = GaN dielectric constant
where the first two terms represent the voltage partition in the oxide and the latter term is the voltage partition in the GaN. If the device and materials are properly designed, the breakdown of the MOS capacitor should be limited by the breakdown field in GaN. Under well-behaved circumstances, the maximum field reached in the oxide under reverse bias is less than the actual oxide breakdown field strength (determined from forward bias breakdown).
Although gate dielectrics are often stressed well below their material breakdown strength, they may experience time-dependent dielectric breakdown (TDDB)—that is, the dielectric could undergo breakdown due to trap-generation and/or bond-breakage when an electrical stress (applied voltage or injected current) is imposed on it for prolonged periods of time. The
38
time-dependent process relies on accumulating a critical amount of damage before electrical failure is triggered. TDDB testing is a cornerstone of reliability measurements and is carried out to predict long-term gate stability and operation. TDDB measurements are typically performed by recording the times-to-failure when a group of identically processed capacitors is stored under a constant field (current density) that is less than EBD (IBD). A constant current stress (CCS) or a constant voltage stress (CVS) is applied until catastrophic breakdown is reached. The CVS and CCS tests may provide complementary information since oxide breakdown may involve a combination of field- and current-based breakdown mechanisms.
Devices stressed at smaller voltages or smaller currents experience longer time-to-breakdown (tBD). Desired operating lifetimes of devices can be on the order of decades long. To ascertain the reliability within a more practical measurement timescale, accelerated measurements are typically performed by stressing the oxide at a current density or voltage close to its catastrophic breakdown point. Modeling is used afterward to extrapolate and predict a maximum operating voltage (or current density) for which a time-to-breakdown, of 20 years for instance, can be confidently obtained.
In CVS testing, the device is biased with a constant VG and the gate current IG is acquired over time. The amount of injected charge estimated by integrating the gate current from t = 0 s to the time-to-breakdown is commonly known as charge-to-breakdown (QBD). Conversely, in CCS testing, the device is injected with a constant current IG and the gate voltage VG is acquired over time. The constant current density multiplied by the time-to-breakdown yields the charge-to-breakdown. Charge-to-breakdown and time-to-breakdown are common metrics used to describe dielectric reliability.
39
Oxide failure statistics are frequently modeled using the Weibull distribution. The Weibull model is based on the “weakest link in the chain” assumption, in which degradation or failure initiated at a local point causes subsequent failure of the entire device. A two-parameter
F = cumulative function, β = shape factor, λ = scale factor
F is the cumulative function that describes the percentage of failed devices at a given charge injection. The β and λ parameters quantitatively describe the statistical breakdown behavior.
β is the shape factor that describes breakdown uniformity. β > 1 indicates a narrow distribution and high breakdown uniformity. In contrast, β < 1 indicates a broad distribution and defect-related, extrinsic breakdown. λ is the scale factor that represents the charge-to-breakdown at the 63% of failed devices. TDDB measurements can be performed in either forward or reverse bias. The most straightforward way to analyze the robustness of the dielectric is from forward bias TDDB measurements on MOS capacitors. These are the measurements carried out in this work. Reverse bias breakdown results tend to have lower statistical uniformity than forward breakdown results, likely due to the inclusion of breakdown effects from both the oxide and GaN layer. In the case of gate-insulated GaN transistors like a MIS-HEMT, the electric field distributions are significantly different between on-state and off-state conditions and time-dependent breakdown processes occur within different regions of the device in addition to the gate. Comprehensive reliability testing of transistors should include both forward and reverse
40
bias measurements. For power MOSFETs, the reliability of the dielectric under reverse stress determines the maximum blocking voltage while the reliability of the dielectric under forward stress determines the minimum on-resistance.
Transient stress/recovery I–V measurements can be performed to determine the density of border traps near the GaN conduction band minimum. In these measurements, the oxide is subjected to a gate bias VG > 0 and then allowed to relax at zero bias VG = 0. A longer relaxation period enables electrons to empty from oxide border traps located further in the bulk. The gate current is monitored during both the stress and relaxation (recovery) phase. In a low field regime, where electrons do not leak from the GaN layer to the gate metal, stress and relaxation currents are equivalent to each other. Integrating the relaxation current over time provides the total amount of electrons emitted back from oxide traps. By counting returned electrons, the lower bound density of active near-conduction band border traps can be approximated.