Chapter11: DSP Engine
11.8 DSP instructions
For using the DSP module in an optimum way, it is necessary to konw all DSP instructions.
The list of DSP instructions, including the parameter description and application of the instruction is presented in table 11-2.
Instruction Instruction and
Values of the Wm and Wn registers are multiplied and added to the current value in the operating accumulator (A or B)
MAC
Values of the Wm and Wn registers are multiplied and added to the current value in the operating accumulator (A or B), from the address pointed by the Wx register the value is read and written to the Wxd register, from the address pointed by the Wy register the value is read and written to the Wyd register.
Values of the Wm and Wn registers are multiplied and added to the current value in the operating accumulator (A or B), from the address pointed by the Wx register the value is read and written to the Wxd register, from the address pointed by the Wy register the value is read and written to the Wyd register, the Wx register value is decreased by kx, the Wy register value is decreased by ky.
Wyd – W6 or
The value from the operating accumulator is saved in the register W13 (AWB - accumulator write back), from the address pointed by the register Wx the value is read and written to the register Wxd, from the address pointed by the register Wy the value is read and written to the register Wyd.
The values in the Wm and Wn registers are multiplied and written to the operating accumulator.
The values of the Wm and Wn registers are muliplied and written to the accumulator (A or B), from the address pointed by the register Wx the value is read and written to the register Wxd, from the address pointed by the register Wy the value is read and written to the register Wyd.
The values of the Wm and Wn registers are multiplied and written to the operating accumulator (A or B), from the address pointed by the Wx register the value is read and written to the Wxd register, from the address pointed by the Wy register the value is read and written to the Wyd register, the Wx register value is increased by kx, the Wy register value is increased by ky.
MPY
The values of the Wm and Wn registers are multiplied and written to the operating accumulator (A or B), from the address pointed by the Wx register the value is read and written to the Wxd register, from the address pointed by the Wy register the value is read and written to the Wyd register, the Wx register value is decreased by kx, the Wy register value is decreased by ky.
The values of the Wm and Wn registers are multiplied and subtracted from the curent value in the operating accumulator (A or B), from the address pointed by the Wx register the value is read and written to the Wxd register, from the address pointed by the Wy register the value is read and written to the Wyd register.
The values of the Wm and Wn registers are multiplied and subtracted from the current value in the operating accumulator (A or B), from the address pointed by the Wx register the value is read and written to the Wxd register, from the address pointed by the Wy register the value is read and written to the Wyd register, the Wx register value is increased by kx, the Wy register value is increased by ky.
The values of the Wm and Wn registers are multiplied and subtracted from the current value in the operating accumulator (A or B), from the address pointed by the Wx register the value is read and written to the
accumulator
Wxd register, from the address pointed by the Wy register the value is read and written to the Wyd register, the Wx register value is decreased by kx, the Wy register value is decreased by ky.
NEG NEG Acc
Acc – A or B (operating accumulator)
Acc ← -Acc, the sign of the current value in the accumulator is changed, analogous to the multiplying of the value in the operating accumulator by –1.
REPEAT REPEAT #lit14
#lit14 – 14-bit unsigned value (0...16383)
The instruction following REPEAT will be executed #lit14+1 times. Even though this is not a DSP instruction, it is very often used when using DSP instructions.
REPEAT REPEAT Wn Wn –
W0...W15
The instruction following REPEAT will be executed Wn+1 times. Even though this is not a DSP instruction, it is very often used when using DSP instructions.
If the optional 4-bit constant is specified, the accumulator value is shifted to the right for the positive value of the constant or to the left if the constant is negative. Then, the obtained value is loaded to Wd.
SAC SAC Acc, {Slit4,}
If the optional 4-bit constant is specified, the accumulator value is shifted to the right for the positive value of the constant or to the left if the constant is negative. Then, the obtained value is loaded to the address in the data memory pointed by the Wd register.
If the optional 4-bit constant is specified, the accumulator value is shifted to the right for the positive value of the constant or to the left if the constant is negative. Then, the obtained value is loaded to the address in the data memory pointed by the Wd register. After memory write, the value of the register Wd is incremented by 2.
SAC SAC Acc, {Slit4,}
If the optional 4-bit constant is specified, the accumulator value is shifted to the right for the positive value of the constant or to the left if the constant is negative. Then, the obtained value is loaded to the address in the data memory pointed by the Wd register. After memory write, the value of
the register Wd is decremented by 2.
If the optional 4-bit constant is specified, the accumulator value is shifted to the right for the positive value of the constant or to the left if the constant is negative. Then, the value of the register Wd is incremented by 2 and the value obtained by shifting is saved in the address pointed by the Wd register.
If the optional 4-bit constant is specified, the accumulator value is shifted to the right for the positive value of the constant or to the left if the constant is negative. Then, the value of the register Wd is decremented by 2 and the value obtained by shifting is saved in the address pointed by the Wd register.
SAC.R The same as for SAC
The same as for SAC
The same as for the SAC instruction except that the value from the accumulator is rounded by the conventional or convergent mode.
SFTAC SFTAC Acc,
#Slit6
#Slit6 – 6-bit constant
Shift the value in the accumulator by #Slit6 bits. If the constant is positive, shifting is to the right, otherwise to the left.
SFTAC SFTAC Acc, Wd Wd – W0...W15
Shift the value in the accumulator by Wd bits. If the register Wd is positive, shifting is to the right, otherwise to the left.
CLR CLR Acc Acc - A or B
accumulator
The value in the operating accumulator is set to zero.
The value in the operating accumulator is set to zero. From the address in the data memory pointed by Wx the value is read and written to the register Wxd. From the address in the data memory pointed by Wy the value is read and written to the register Wyd.
The value in the operating accumulator is set to zero. From the address in the data memory pointed by Wx the value is read and written to the register Wxd. From the address in the data memory pointed by Wy the value is read and written to the register Wyd. The Wx register value is increased by kx, the Wy register value is increased by ky.
Table 11-2 List of DSP instructions with description of operations and parameters.
Table 11-2 shows that some instructions (such as MAC) could have more than one form. All versions of the instructions have not been descibed, but the emphasis was put on the most frequently used versions, in order to illustrate the way of thinking when using DSP instructions.
The structures of individual registers of the DSP module are given in Tables 11-3 to 11-6.
NOTE: Reading of bits which have not been alocated any functions gives '0'.
name ADR 15 14 13 12 11 10 9 8 CORCON 0x0044 - - - US EDT DL<2:0>
7 6 5 4 3 2 1 0 Reset State
SATA SATB SATDW ACCSAT IPL3 PSV RND IF 0x0020 Table 11-3 Description of the CORCON register
US – DSP multiply unsigned/signed control bit
(1 – unsigned multiplication, 0 – signed multiplication)
EDT – Early DO loop termination control bit. This bit will always read as’0’.
1 – Terminate executing DO lop at the end of current loop iteration 0 – No effect
DL<2:0> - DO loop nesting level status bit 111 – 7 nested DO loops active
110 – 6 nested DO loops active ...
001 – 1 nested DO loop active 000 – 0 DO loops active
SATA – AccA saturation enable bit
1 – Accumulator A saturation enabled 0 – Accumulator A saturation disabled SATB – AccB saturation enable bit
1 – Accumulator B saturation enabled 0 – Accumulator B saturation disabled
SATDW – Data space write from DSP engine saturation enable bit 1 – Data space write saturation enabled
0 – Data space write saturation disabled ACCSAT – Accumlator saturation mode select bit 1 – 9.31 saturation (super saturation) 0 – 1.31 saturation (normal saturation) IPL3 – CPU interrupt priority level status bit
1 – CPU interrupt priority level is greater than 7 0 – CPU interrupt priority level is 7 or less PSV – Program space visibility in data space enable bit
(1 – PSV visible in data space, 0 – PSV not visible in data space) RND – Rounding mode select bit
(1- conventional rounding enabled, 0 – convergent rounding enabled) IF – Integer or fractional multiplier mode select bit
(1 – integer mode enabled, 0 – fractional mode enabled (1.15 radix))
name ADR 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 Reset State
ACCAU 0x0026 SE ACCAU 0x0000
Table 11-4a Description of the ACCA register
name ADR 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Reset State
ACCAH 0x0024 ACCAH 0x0000
Table 11-4b Description of the ACCA register
name ADR 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reset State
ACCAL 0x0022 ACCAL 0x0000
SE – Sign extention for AccA accumulator Table 11-4c Description of the ACCA register
name ADR 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 Reset State
ACCBU 0x002C SE ACCBU 0x0000
Table 11-5a Description of the ACCB register
name ADR 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Reset State
ACCBH 0x002A ACCBH 0x0000
Table 11-5b Description of the ACCB register
name ADR 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reset State
ACCBL 0x0028 ACCBL 0x0000
SE – Sign extention for AccB accumulator Table 11-5c Description of the ACCB register
name ADR 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reset State SR 0x0042 OA OB SA SB OAB SAB DA DC IPL<2:0> RA N OV Z C 0x0000 SE – Sign extention for AccB accumulator
Table 11-6 Description of the SR register
OA – Accumulator A overflow status bit
(1 – accumulator A overflowed, 0 – accumulator A has not overflowed) OB - Accumulator B overflow status bit
(1 – accumulator B overflowed, 0 – accumulator B has not overflowed) SA – Accumulator A saturation ‘sticky’ status bit.
This bit can be cleared or read but not set to ‘1’.
1 – accumulator A is saturated or has been saturated at some time 0 – accumulator A is not saturated
SB – Accumulator B saturation ‘sticky’ status bit.
This bit can be cleared or read but not set to ‘1’.
1 – accumulator B is saturated or has been saturated at some time 0 – accumulator B is not saturated
OAB - OA¦¦OB combined accumulator overflow status bit 1 – accumulators A or B have overflowed
0 – neither accumulator A or B have overflowed SAB - SA¦¦SB combined accumulator ‘sticky’ status bit
1 – accumulators A or B saturated or have been saturated at some time 0 – neither accumulator A or B are saturated
DA – DO loop active bit
(1 – DO loop in progress, 0 – DO loop not in progress)
DC – MCU ALU half carry/borrow bit (1 – a carry-out from the 4th order bit (8-bit operations) or 8th order bit (16-bit operations) of the result occured,
0 – no carry-out from the 4th order bit (8-bit operations) or 8th order bit (16-bit operations) of the result occured ) IPL<2:0> - CPU internal priority level status bit.
These bits are concatenated with the IPL<3> bit (CORCON<3>) to form
the CPU interrupt priority level.
111 – CPU interrupt priority level is 7(15). User interrupts disabled.
110 – CPU interrupt priority level is 6(14). User interrupts disabled.
...
001 – CPU interrupt priority level is 1(9). User interrupts disabled.
000 – CPU interrupt priority level is 0(8). User interrupts disabled.
RA – REPEAT loop active bit
(1 – REPEAT loop in progress, 0 – REPEAT loop not in progress) N – MCU ALU negative bit
(1- result was negative, 0 – result was non-negative (zero or positive) OV – MCU ALU overflow bit (1 – overflow occured for signed arithmetic, 0 – no ovwerflow occured). This bit is used for signed arithmetic (2’s complement).
It indicates an overflow of the magnitude which causes the sign bit to
change state.
Z – MCU ALU Zero bit (1 – a zero result, 0 – a non-zero result)
C – MCU ALU carry/borrow bit (1 – a carry-out from the MS bit of the result occured,
0 – no carry-out from the MS bit of the result occured)