D-LAYER: Overall Algorithm

In this sub-section, we summarize the overall flow to implement the distributed model- based retargeting methodology as shown in figure 7.18. Where the metal layer first gets its normal etch correction and SRAF insertion to reach the final litho-target intended on wafer. Then To add the via awareness, an additional step is used to compute the via flexibility to retargeting (shifting around based on the D-LAYER needs to fix the metal hot-spots). Then we use MIB [140] to perturb the target layer into an approximate mask, which results in a more robust hot-spots capturing and analysis using the LAYER model simulations. This is followed by the application of the full distributed retargeting using D-LAYER.

Figure 7.18: The general flow for using D-LAYER in the mask tape-out flow or in LFD. The flow chart shown in figure 7.19 and the pseudo code in 3 summarize the whole D-LAYER algorithm and our implementation. First, the inputs (both the layer to retarget and the adjacent different color designs) are passed to the engine to get fragmented to

allow their retargeting. Also, the via retargetability information is passed along to be used during the retargeting.

Algorithm 3 D-LAYER algorithm

1: _{procedure DLAYER(LithoTarget,DiffColorTargets,Vias)} 2: ApproxMask ← MIB(LithoTarget)

3: HotSpots(LithoTarget) ← LAYERSimulate(ApproxMask)

4: for each Fragment Frag ∈ LithoTarget do

5: Calculate kin,kout

6: RetargetingForce(Frag) = 0

7: for each HotSpot HS ∈ HotSpots(LithoTarget) do

8: RetargetingForce(Frag) ← RetargetingForce(Frag) + R(HS,r)

9: if RetargetingForce(Frag) > 0 then

10: Displacement(Frag) ← RetargetingForce(Frag)/kout

11: else

12: Displacement(Frag) ← RetargetingForce(Frag)/kin

13: Move all Fragments(LithoTarget) respecting Wmin,Smin

After that, the LAYER model simulations are done on the MIB-output (the approxi- mate mask) to capture the hot spots, recording their center locations and using the pat- terning strength signals to calculate the directional retargetability coefficients kin and kout.

These retargetability coefficients also include the effect of nearby vias and their retar- getability. This is then followed by nested loops of looping over all fragments and looping over all nearby hot-spots to each fragment to calculate the effective retargeting forces over all the design fragments and to calculate the required movement per fragment based on the applied retargeting force and each fragment retargetability constant.

Finally, the fragments are moved to follow the retargeting displacement per fragment, however, this movement is constrained by the minimum same-color and different-color CDs. Then another loop over all the fragments is done to find fragments that are constrained and update their k values (as they will be now operating in a parallel spring configuration) to resist back the retargeting forces and calculating the new retargeting displacements. As for the constraining fragments, the retargeting forces on them is updated to include the transferred force from the opposite fragment that they are constraining. After that, the design fragments are moved and then followed by another adjustment on the different color and vias retargeting to follow the distributed retargeting that was applied.

7.3

Testing Results

We implemented the D-LAYER methodology by using the c-based Litho API tool provided by Mentor Graphics Calibre, where all the functionalities mentioned in this paper were coded to provide distributed model-based retargeting. We test it on a 10nm metal layer and compare it to a regular PWOPC solution. We performed our testing on a 0.5 mm x0.5 mm sized design that constitutes a wide variety of designs and a significant contribution of random logic blocks. In the comparison, we focus on both the same-color and different-color patterning quality as well as the speed. The OPC recipe used with D-LAYER is a nominal OPC recipe, in which the goal of OPC is to converge on target with a minimum EPE. This is mainly because the D-LAYER output is more patterning friendly and a much less aggressive OPC solution can be used to do the mask correction. This proves the validity of our methodology, where with a minimal amount of computation, a litho-friendly target can be generated instead of wasting too much computation iteratively during PWOPC.

Figures 7.20 and 7.21 show snapshots of the post-etch simulations different colors for this LELELE multiple patterning metal, where the different color-aware D-LAYER shows the capability of improving both the same-color patterning without creating any different- color issues.

A more quantitative comparison is shown in figure7.22, where the through-PW width and space distribution is plotted for both solutions. D-LAYER is showing a better overall distribution specially at the tail, where the yield-limiting failures are located. In this plot it is clear that the D-LAYER algorithm managed to eliminate the worst tens instances of issues and fixing them (by shifting their through PW CDs towards the larger CDs). Achieving this simultaneously for both width and space in the 10nm technology node is not a trivial thing due to the complexity of the patterns interaction as discussed earlier. This improvement has a direct impact on the yield, where each of these hot-spots contributed to the yield (or reliability) degradation of the final product.

The computation power assessment is also a fundamental metric that needs to be analyzed. Figure7.23shows the normalized CPU-runtime product comparing both the D- LAYER-based solution vs the reference PWOPC solution. It is clear that although there is an overhead for the D-LAYER solution, it saves that overhead and more by allowing the OPC to switch to nominal OPC, which saves an overall runtime of almost 12%.

(a) D-LAYER + Nominal OPC.

(b) PWOPC.

Figure 7.20: Comparing the PVBands of the D-LAYER solution to the reference PWOPC solution as expected on wafer for the multiple patterning solution.

(a) D-LAYER + Nominal OPC. (b) PWOPC.

Figure 7.21: Comparing the post-etch PVBands of the D-LAYER solution to the reference PWOPC solution, D-LAYER shows better overall results.

Figure 7.22: Through PW width and space CD distribution, comparing the tail distribution for both D-LAYER and the reference PWOPC.

Figure 7.23: Runtime comparison between D-LAYER flow and the reference PWOPC.