Evolutionary computation exploration requires the physical properties of the computational material to be manipulated in various ways. The effect of various signal properties
such as, voltage/current levels, AC, DC, pulse or frequency, on material’s computational capabilities are still unknown. Mecobo [148] was designed as an interface to handle
Figure 3.10: The complete setup to conduct EIM experiments.
various physical and electrical signal properties in order to facilitate unconstrained evolution of computation by the materials.
Figure 3.11 presents a systematic view of hardware interface (Mecobo) with software and the material sample. Mecobo can be connected to host computer over USB as a stand-alone interface. The host computer runs the system interface as well as the optimisation algorithm which provides the configuration information. Software interface configures the hardware interface by providing the configuration information for each connection between the nano material and hardware interface. Alternatively, it transforms the output response from the material into appropriate data format for the optimisation algorithm.
Figure 3.13 shows the main components of Mecobo. Mecobo was designed as PCB board with FPGA and micro-controller as main components. The micro-controller accepts the commands from the host computer and implements them on FPGA via shared memory. Whereas, FPGA establishes the physical and logical communication
Figure 3.11: Mecobo hardware/software interface with material sample. with the material substrates. Digital I/O can produce digital signals and sample responses. Where as, analogue output signals are produced by the DAC module. The DAC module can also produce static voltages or time dependent waveforms. The ADC modules perform the sampling of analogue waveforms received from the material.
There are different types of parameters that are associated with the digital and analogue signals that enable the variety of configuration signals applied to the material substrates. The list of these parameters with respect to different electrical signals is given in Table 3.3. Furthermore, a scheduler was implemented in the hardware that can schedule the time slots for different I/O or configuration signals or to compensate delays when materials need time to settle before any meaningful computation can be observed. A scheduler can be seen in Figure 3.14, that illustrates interface hardware implementation. After the time slots have been allocated for different input/output operations on different pins, these operations will be played back just like music or video editing applications. Figure 3.12, illustrates an example of this implementation, where PIN01,PIN02, PIN03 and PIN04 act as input pins and different voltage operations with different durations
Parameter Description
Amplitude
Amplitude for static voltage signals Range:[0-255]
0=-5 V,255= +5 V
Frequency Frequency of square wave signals Cycle Cycle of square wave signals Phase Phase of square wave signals
Start time Start time of voltage application (in milli seconds) End time End time of voltage application (in milli seconds)
Table 3.3: Mecobo’s adjustable parameters
are scheduled to be applied on to the material. PIN00 act as an output pin, which will receive the output signals from the material during that specific duration. Due to the fact that the SWCNTs/polymer samples are randomly distributed over the micro-electrode arrays and there are no specific input/output locations, the choice of input/output and configuration terminals should be left to optimisation control. In order to achieve this, a pin routing module was placed between signal generating modules and the sampling buffer. Hence, in contrast to previous hardware (mbed) where pin configuration was predetermined, the Mecobo implemented pin configuration under optimisation control.
Figure 3.12: An example of implementation of track based model of scheduler.
Optimisation algorithms and
computational problems
This chapter discusses the optimisation and evolutionary algorithms that are used in the experiments described in following chapters. Section 2 discusses the Nelder-Mead algorithm, where as section 2 describes the Particle swarm algorithm. Section 3 discusses the threshold concept, that is used to implement threshold logic gates in different SWCNTs composites.
4.1
Introduction
Unconventional computing systems widely employ evolutionary algorithms in their design and implementation. An evolutionary algorithm is stochastic search technique that is inspired by different biological mechanisms to solve optimisation problems.
An important field of research called evolvable hardware uses evolutionary algorithms to design and create electronics. In [149] a genetic algorithm is used to evolve FPGA to produce circuits to calculate Boolean function. A lot of research on FPGAs and evolvable hardware and its implementation is reported in
literature, for example [150], [151], [111], [152], [62], [64]. A device called FPMA is described in [62] that uses genetic algorithms, to find solutions to the problems by exploiting the physical properties of FPMA. This technique includes hardware in the loop to calculate the objective function for every candidate solution. The FPMAallows ‘evolution in materio’.
Different stochastic search algorithms have the potential to be used with EIM. However, only genetic algorithms have been explored so far [153], [54], [38], [40], [41], [39]. An important direction of research in this thesis is to explore algorithms that can be appropriate to use with different types materials and different computational problems. This chapter describes three main algorithms that have been used for various experiments described in this thesis. In the start, a very simple, simplex based, heuristic search algorithm called Nelder-Mead algorithm is used for experiments described in chapter 5 and chapter 6. Later, Particle Swarm algorithm (PSO) and Differential evolution are used for experiments described in Chapter 5 and performance of Nelder-Mead algorithm and PSO is compared. Differential evolution algorithm showed better performance in solution of more complex logic circuits, such as Full adder, the results are discussed in detail in Chapter 5. Chapter 6 used variant of PSO called Shortest Position Value (SPV) rule for solving complex logic circuits on the purpose built platform, ‘Mecobo’. The detailed description of these algorithms is given in following sections.