Bandgap references are ubiquitous in many electronic systems due to their (nearly) constant output voltages regardless of PVT (Process-Voltage-Temperature) variations. From a novel concept in the 60s and 70s ([7], [8], [9], [10]), the topic has evolved greatly leading to some outstanding designs in terms of very low spread between realized samples [11], low-supply voltage architectures [12] etc... Innovations are still rife in the field even after over four decades of research as evident by some excellent recent publications on compact sub-1V references [2] or references with extremely low temperature-coefficients [13].
An option for a circuit, that produces a stable voltage output, could be a non-linear voltage divider (see Fig.1-1).
Z
ϭs
s
ŽƵƚFigure 1-1: Basic Voltage Reference
1.1. MOTIVATION AND OBJECTIVES 13
In this case, the diode voltage is the output voltage. However, the diode voltage, Vout has a strong temperature dependence of about -2mV/◦C and varies by hundreds of millivolts in the desired temperature range (−40◦C to 125◦C) [14].
A temperature-independent and stable voltage reference can be realized using a zener diode, biased in break-down region, i.e at a reverse bias voltage greater than Vbrwhen the voltage across the junction is constant over a large range of currents (see the current-voltage characteristic of a zener diode in Fig.1-2).
Figure 1-2: Current-voltage (I-V) characteristic of a zener diode [1]
The breakdown of a zener diode can occur via two kinds of mechanisms [1]:
• Avalanche breakdown: This type of breakdown occurs due to high electric fields. The charge carriers are accelerated in the presence of high electric field and ionize atoms. A larger number of charge carriers result, leading to a large current. The voltage due to avalanche breakdown has a positive temperature co-efficient. This is because with increased temperature, mobility of the charge carriers decreases and a higher electric field (and therefore, a higher voltage) is needed to effect the breakdown [1].
• Zener breakdown: Zener breakdown occurs at relatively lower voltages than avalanche breakdown. In [1], it is shown that at a lower breakdown voltage (than in the case of avalanche breakdown), separation W between conduction and valence bands reduces to a very small value (see Fig.1-3). When W goes below a ‘critical’ value, charge carriers can tunnel through the bands, leading to zener breakdown. The voltage due to zener breakdown has a negative temperature co-efficient because the barrier width, W decreases with temperature [1].
1.1. MOTIVATION AND OBJECTIVES 14
Figure 1-3: Band diagram with overlapping conduction and valence bands-zener breakdown [1]
If the zener diode is biased in such a way that zener and avalanche breakdown effects are equally significant, then a temperature -independent voltage can be realized. However, zener and avalanche breakdowns occur at 5-7 V [1]. Furthermore, deep buried zener diodes are not easily available in standard CMOS processes.
Hence, references based on zener diodes have become quite obsolete and are also, not suitable for this work.
For lower supply voltages, a separate class of circuits called “bandgap references"[8] are used. In this class of circuits, the endeavour is to find two voltages having opposite temperature dependencies. In other words, if a voltage, Vptat, with positive temperature dependence, and a voltage, Vctat, with a negative temperature de-pendence, can be found; then a temperature-independent output voltage, Vbgcould be obtained by appropriate signal processing (see Fig.1-4).
Temperature Voltage
Vbg Vctat
Vptat
Figure 1-4: Obtaining a temperature-independent voltage source
For an ideal diode, the current Idiodeis given by:
Idiode= Isexp(Vdiode
kT/q ) (1.1)
1.1. MOTIVATION AND OBJECTIVES 15
where, Isis a process-dependent constant, called the saturation current, Vdiodeis the junction voltage across the diode, k is the Boltzmann constant (1.38 ∗ 10−23J/K), T is the absolute temperature in Kelvin(K) and q is the electronic charge (1.6 ∗ 10−19 C). The voltage across a single diode Vdiodeis a CTAT quantity [14], [1].
Furthermore, if two diodes are biased with a current ratio of 1:N ( for example-the ratio between I1and I2in Fig.1-5) then (1.1) leads to :
Vdiode1− Vdiode2= ∆Vdiode= kT
qlnN (1.2)
Therefore, from (1.2), it is seen that an exponential current-voltage relationship helps to easily generate Vptat. This, along with CTAT nature of the diode voltage Vdiode[14], [1], indicates that devices with exponential current-voltage relationships can be used to realize a temperature-independent bandgap voltage by summing a Vctatwith an appropriately scaled Vptat(see Fig.1-5)
K
I1 I2
Vptat
K*Vptat Vctat
Vbg = Vctat + K*Vptat
Figure 1-5: Principle of Bandgap Reference
Traditionally, designs have featured the use of BJTs because of their well-defined exponential current-voltage relationship [14]. Even for designs in CMOS processes, parasitic BJTs have been found to yield the best results [11]. However, with shrinking feature sizes, the use of traditional topologies becomes more and more difficult. The models for parasitic BJTs are not very well-defined in CMOS processes and the problem becomes more severe for lower feature sizes [15]. This leads to significant differences between the simulated results and actual silicon. But, perhaps the greatest issue with traditional BJT based references is that they produce an output voltage around the bandgap voltage of Silicon i.e, 1.2 V. However, with supply voltages going down to 1V and below in Deep Sub-Micron (DSM) technologies, these designs have become obsolete.
Although current-mode references such as [12] produce lower output voltages, they tend to occupy a lot of area as they are mainly dependent on resistive divisions and therefore, need large resistors for implementation.
1.1. MOTIVATION AND OBJECTIVES 16
When operated in the sub-threshold region, standard MOSFETs also exhibit an exponential voltage-to-current behavior. As a result, they can also be used to realize "bandgap" voltage references. However, the resulting reference voltages are much less than the bandgap voltage of silicon. Hence, it is desirable to replace the BJTs by standard MOS transistors. Several attempts have been made in this regard to use MOSFETs in the sub-threshold region, but the results have been quite poor, compared to BJT based designs [16], [17], [18].
However, connecting the gate to the back-gate of a PMOS, leads to a new device called DTMOST (Dynamic Threshold MOSFET) [4]. The details of this device are discussed in Chapter 3. This device, when operated in weak inversion, has a near-ideal exponential current-voltage relationship, very similar to that of an ideal diode and produces a “bandgap" voltage of about 0.6V (half that of BJTs) [4].
Furthermore, results for bandgap reference [4] and temperature sensors have been published using DTMOSTs [15] that are comparable to state-of-the art bandgap references and temperature sensors using BJTs. This presents an excellent motivation to study the use of DTMOST for sub-1V Bandgap References. Other impor-tant goals are negligible power consumption and low silicon real estate.
Since the accuracy of a voltage reference depends on process spread, silicon validation is essential. In this work, the NXP 0.16 µm CMOS technology was chosen, since a DTMOST-based temperature sensor [15]
was published with excellent temperature resolution. This was followed by demonstration of the feasibility of the approach in an advanced process like TSMC 40 nm CMOS. The key design goals are summarized in Table 1.1. It is pertinent to note that the reference is to be designed to drive a high-impedance load and hence, load regulation is not an important specification for this design.
Table 1.1: Main specifications for the Bandgap Reference
Parameter Value
Output Voltage ∼0.6-0.7V
Technology Standard CMOS(0.16 µm, 40 nm)
Minimum Supply Voltage < 1V
Temperature Range −40
◦C to 125
◦C
3σ spread < 5%
Temperature Drift < 100 ppm/
◦C Current Consumption < 5 µA at all corners
Active Area 6 0.05mm
2This thesis describes how a DTMOST based bandgap reference was implemented in CMOS technology. This has been demonstrated by a prototype, which will be described in Chapter 4. 20 chips have been taped out