DIP Switches,
Jumpers Technical Indices Backboard Precautions
Chapter 3 MGW Boards
and POS interfaces of ATM. Then, it restores IP packets and sorts them. After the process ends, it exchanges data to main processing unit of the system for further processing through control Ethernet interface of the resource box. According to the destination address routes of IP packets, MNIC transmits service flow data of user planes to corresponding internal processing boards through media stream switch Ethernet. MNIC also performs protocol processing such as IP data filtering and NAT translation to assure IP communication inside the equipment. Two MNIC boards are configured as 1+1 backup or load sharing. In the ZXWN MGW system, the MNIC board can be used as the SIPI and IPI logical boards. The working mode is 1+1 backup or load sharing when the MNIC board is used as the IPI board. The IPI board provides the physical interface to the external IP networks. The IPI board performs the bottom-layer IP protocol processing first for the IP data entering the system. The IPI board forwards the service flow data of the user plane to the corresponding processing board through media flow switching Ethernet according to the destination address route of the IP data packet. In addition, the IPI board also can implements the IP data filter, NAT conversion and other protocol processing as required to protect the IP communication inside the equipment. Following are the functions of SIPI board:
Providing 1×100M control flow Ethernet interfaces Providing 1×100M Ethernet data backup channels Providing RS485 backup control channel interfaces Supports 1+1 active/standby logical control of the board Providing at most 4 FE interfaces for the external network.
In the ZXWN MGW system, the MNIC board can be used as the SIPI and IPI logical boards. The working mode is 1+1 backup or load sharing when the MNIC board is used as the SIPI board. When used as the SIPI board, the MNIC board provides the bottom-layer IP interface of the H248 signaling of the Mc interface. The SIPI board performs the bottom-layer IP protocol processing first for the packet data entering the system, and sends the SCTP packet to the home SMP through the control Ethernet port of the resource shelf. The SMP performs the processing of the SCTP, M3UA and other upper-layer protocols. The SIPI board also can implements the IP data filter, NAT conversion and other protocol processing as required to protect the IP communication inside the equipment.
Following are the functions of SIPI board:
Providing 1×100M control flow Ethernet interfaces Providing 1×100M Ethernet data backup channels
Confidential and Proprietary Information of ZTE CORPORATION 83
Functions of
ZXWN MGW Media Gateway Hardware Description
Providing RS485 backup control channel interfaces Supports 1+1 active/standby logical control of the board Providing at most 4 FE interfaces for the external network.
MNIC board consists of many parts such as network processor systems, physical interface parts and CPU systems. CPU units are implemented in the form of daughter cards. Data transmission between daughter cards and network processor systems is done through PCI bus and internal bus.
External devices connecting to PCI bus of the network processor include CPU daughter cards and Ethernet chips. Co-processors are connected on standard mode of daughter cards. One of two Ethernet chips serves as a data backup channel. If a CPU daughter card exists, then no need to install the data channel and it is provided by CPU. If a CPU daughter card does not exist, use the channel to back up active/standby data. Other Ethernet chip serves as a control flow channel to communicate with the UIM. In addition, it can be use to debug and download codes. Figure 54 shows the working principle of MNIC board.
FI G U R E 5 4 M N I C BO A R D WO R K I N G PR I N C I P L E
In MSCS, MNIC board is used as IPI logical board. Figure 55 shows the panel of IPI board.
Working
Chapter 3 MGW Boards FI G U R E 5 5 PA N E L O F M N I C BO A R D LINK1 LINK3 ACT ENUM RST LINK2 LINK4 ALM EXCH RUN IPI
ZXWN MGW Media Gateway Hardware Description
Table 46 shows indicators of MNIC board.
TA B L E 4 6 IN D I C A T O R S O F M N I C B O A R D
Indicator Color Indication Description
RUN Green Run indicator
Flashing at 5Hz: indicates board is power on. Flashing at 1Hz: indicates board is running normally.
ACT Green Active/ Standby indicator
On: Board is active. Off: Board is standby.
ALM Red Alarm
indicator
On: Alarm exists on board. Off: No alarm exists on board
ENUM Yellow Board extraction Indicator
When board inserts into a slot, by default ENUM indicator is on. When software detects ENUM signal and finds that extractor is closed, ENUM indicator turns off to indicate the system to work. LINK1 Green Status indicator of external 100M access network port 1
On: External 100M access network port 1 is
connected.
Off: External 100M access network port 1 is not connected. LINK2 Green Status indicator of external 100M access network port 2
On: External 100M access network port 2 is
connected.
Off: External 100M access network port 2 is not connected. LINK3 Green Status indicator of external 100M access network port 3
On: External 100M access network port 3 is
connected.
Off: External 100M access network port 3 is not connected.
Status On: External 100M access
Chapter 3 MGW Boards
Table 47 shows list of buttons on MNIC board
TA B L E 4 7 BU T T O N S I N M N I C B O A R D
Button Name Description
EXCH Perform active/standby
changeover of MNIC board
RST Reset MNIC board
Figure 56 shows the layout of MNIC board.
FI G U R E 5 6 M N I C LA Y O U T
There is no DIP switch or jumper for MNIC.
Table 48 shows external interfaces of MNIC board.
TA B L E 4 8 E X T E R N A L IN T E R F A C E S O F M N IC B O A R D
Interface Purpose
1 GE interface or four to eight FE
interfaces. External work of MNIC
Confidential and Proprietary Information of ZTE CORPORATION 87
Buttons Layout DIP Switches
ZXWN MGW Media Gateway Hardware Description
Processing capacity of the board is 400M and MNIC supports hot-swap.
RMNIC is the only backboard for MNIC board, as shown in Figure 57 .
Technical
Chapter 3 MGW Boards FI G U R E 5 7 M N I C BA C K B O A R D PrPMC232 8KOUT/ARM232 DEBUG-FE FE4 FE3 RMNIC FE2 FE1
The RMNIC board provides the following interfaces:
Confidential and Proprietary Information of ZTE CORPORATION 89
Interface Description
ZXWN MGW Media Gateway Hardware Description
FE1~FE4 (RJ45 interface): The IPI board provides 4 FE
interfaces, supporting at most 60Mbit/s IP signaling flow.
8KOUT/ARM232 (RJ45 interface): used to output the 8K
system clock to the UIM board, and provide the reference clock for the boards in the shelf. In addition, this interface can be used for debugging, and does not provide service functions in this case.
PrPMC232 and DEBUG-FE (RJ45 interface): This interface can
be used for debugging, and does not provide service functions in this case.
Strictly observe operation regulations to prevent electrostatic damage to large scale integrated circuits on the board