Optical Probe Description

4.3.1. Light Emission Module

The VCSEL is a 100-μm top-emitting GaAs-based laser with a very high-modulation rate. The designed VCSEL driver converts CMOS-level input signals to current mode output signals [113, 114]. An integrated signal generator can be used to generate the electrical signal inside or can also process off-chip signal. Figure 4.3 (inset) shows the schematic of the VCSEL driver circuit, working on a simple principle that a MOS transistor in saturation acts as a current source. It is based on a two-transistor model which had their source shorted together : one transistor is designed to provide a bias current to the VCSEL, while the other is used to supply the modulation current. The gate of one transistor is tied to an analog voltage to set the VCSEL bias current while the gate of the other is connected to a CMOS-level digital input signal that controls the modulation current. The drain terminals of the NMOS transistors are connected to the cathode of the VCSEL, while its anode is connected to a single power supply for the circuit. Both NMOS transistors have a drawn gate length of 0.5 µm and a gate width of 30 μm, which Figure 4.5. Simplified block diagram of the Fast-Gated Detector Module with the integrated counter

Figure 4.6. Photon counts distribution within a 5 ns gate-ON time window.

were wide enough to allow biasing and modulation currents ranging from 0 to 8-mA. The proposed technique allows for easy integration of VCSEL with CMOS circuitry. An optimized monostable multivibrator, generating pulses with width varying from 500 ps to 4 ns with very sharp transitions, was used to drive the transistors ensuring high-speed operation.

To validate the system, we connected a VCSEL (VI integrated systems, 850nm) and fixed the biasing voltage (Vbias) while varying the source (VCC). The measured peak output power of the VCSEL was 5.8 mW. We first measured the I-V characteristics (Fig. 4.3) and observed the linearity of the optical power with the current. We then aimed at characterizing the operation in pulse mode. The gate modulation voltage varied from 1.0 to 3.0 V with a pulse width of less than 1 ns. The resulting modulated light was loosely focused on a fast silicon single-photon detector, whose output was coupled to a Time Corelated Single Photon Counting (TCSPC) module (Picoquant). Figure 4.4 shows the resulting detected signal from the input-modulated VCSEL with a repetition rate of 100 MHz and FWHM of 350 ps.

4.3.2. Fast Time-Gated Detection Block

The module can be operated in free-running or time-gated mode. The functionality of the time- gated detection unit is to turn-on the SPAD during specific time windows. The module can operate with off-chip sync pulses or the same can also be generated internally by the synchronization block. The variable time window generator modulates the duty cycle of the

Figure 4.7. Dependence of the SPAD count rate on the input photon flux

Figure 4.8. Stability of the module count-rate over a time range of 1 hour.

gating pulse to provide a suitable ON-time to the detector ranging from from 1 to 50 ns. A high- voltage driver was designed to adjust and provide a suitable excess-bias voltage to the SPAD (2 to 9 volts) which has a breakdown voltage of 26.5V. The avalanche signal is sensed by the SPAD Front-end consisting of an active SPAD and a dummy one, operating in passive- quenching active-reset mode. The differential topology rejects the spurious noise and a clean rectangular pulse is generated at the output of the comparator. The quench and reset block provides the necessary signals to restore the initial operating conditions of the SPAD and get it ready for another detection. After the detection of a photon, the hold-off generator turns off the SPAD for a specific hold-off time, in the range of 5 to 25 ns. The analog counter counts the photon pulses within an observation window. The small area SPADs (10, 20 and 30 μm) were

fabricated in Fraunhofer IMS [76]. The ability of the module to provide a good time-filtering of incoming photons can be demonstrated by Fig. 4.6 which shows the photon count distribution for a 5 ns gate-ON time window. The sharp transition times of the gate window (20–80% rise time of 500 ps with a smooth edge shape) is instrumental in the prompt rejection of the unwanted photons outside the window.

Figure 4.7 shows the relationship between incoming photon flux and measured count rate with the fast-gated SPAD detector. The integration time is 50 ms and was counted for 30 sec at each observation point. It is also observed that the SPAD has extremely low dark count rates (DCR) with a maximum of 60 cps. The slight deviation in linearity might be due to the fluctuation in the optical power of the laser source. Figure 4.8 shows the stability of the count-rate of the single photon counting module over a time-period of 60 min. The photon rate was kept at a very low level using a continuous-wave laser source with the module running at ambient temperature without any cooling system. The fluctuation of less than 1% might be due to poissonian noise and slight instability in the laser output power or ambient conditions. These values highlight the stability of the module without any cooling system. Temperature control using a two-stage Thermo Electric Cooler (TEC) is a major drawback for the miniaturization of the time-gated module to be integrated in an optode with the light source. Due to measured characteristics, our data suggests these SPADs can be used without any cooling modules and are most suitable for the development of on-chip source and detector, which can be used for photon migration measurements.