An FSvia-generated S-Parameter model containing values for a range of frequencies, as specified by the user
Signal/Signal Coupled Via
Represents a via model between two signals.
Signal/Ground Coupled Via
Represents a via model between a signal and a ground component.
Signal/Power Coupled Via
Represents a via model between a signal and a power component.
Stacked Coupled Via
need Info
Shape Models a copper shape encountered in a physical design.
Pin need Info
Model Verification and Source Management
You perform verification and source management operations on the device models in a selected design or library by choosing Analyze – Model Dump/Refresh from the PCB SI menu bar.
Figure 2-14 Model / Dump Refresh Dialog Box
Use this dialog box to perform verification and source management operations on the device models in a selected design or library. Upon displaying the dialog box, models resident in the current design are checked against their original source. Once the check is completed, the
List of all models in the selected design or library.
Current model status based on the auto source check.
dialog box displays a list of all models in the design and shows related source and status information for each model.
3
Model and Library Management
Managing Model Libraries
Introduction to Model Libraries
When analyzing a design, PCB SI builds simulation circuits using the device models that have been stored in your design (.brd file). These resident device models are associated with devices in your design. During simulation, SigNoise automatically constructs the required interconnect models. The actual source files for these device and interconnect models are stored and organized in either device model libraries (DML’s) or interconnect model libraries (IML’s) that are external from the design database.
Working with SI Model Browser
You use the Signal Model Browser and the DML Library Management dialog boxes to create and manage your libraries of device and interconnect models, and launch Model Editor. You can also use it to specify which device and interconnect libraries you want SigXplorer to access, as well as the order of library access.
To access the
SI Model Browser
dialog box from PCB SI➤ Choose Analyze – Model Browser.
Figure 3-1 SI Model Browser
The SI Model Browser’s tabbed interface accommodates the model type that you want to translate, be it IBIS, Spectre, Spice, IML, DML, or HSPICE. You need to select the appropriate tab, click the model, and click the Translate button to translate it. From these tabs, you can also edit a model directly in its native format. Once translated, these models also appear under the DML tab.
Each tab contains a field for filtering the listed models, as well as a button to set the model’s library search path and to set its associated file extensions.
Performing Library Management
You use the DML Library Management dialog box to manage DML libraries. To access the DML Library Management dialog box, click the Library Mgmt button on the DML Models or the IML Models tab of SI Model Browser dialog.
The DML Library Management dialog box provides controls to set the working library, ignore libraries, and create indices.
Using the DML Library Management dialog box, you can:
■ create a new library and add it to the list of libraries
■ Perform a syntax check on a DML library
■ specify the working libraries
■ merge two or more device model libraries
Basic Library Management
Adding and Removing Libraries in a Search List
You cannot access device and interconnect models unless their libraries are first added to the library search list. Conversely, if a library is no longer in use, you can remove it from the search list thereby improving overall library access performance.
Reordering the libraries in a Search List
Libraries are searched starting at the top of the list. In cases where a model is included in two or more libraries, you can use the search order to determine which library SigNoise searches first. SigNoise uses the first model found.
Specifying the Working Device and Interconnect Libraries
SigNoise only adds models to the working libraries. If you want to add a model to a library that is not the working library, you must first make it the working library before you start the process. You can have one working device model library and one working interconnect model library active at one time.
Important
The name of the working library for device or interconnect models appears in the
Advanced Library Management
Adding Device Library Indices to a Search List
To improve access performance with large device model libraries, you can add a library index (in place of the library file) to the Device Library search list. An index is a .ndx file that contains pointers to the device models in the DML. The index requires fewer resources because only models required for analysis are loaded from the index into memory, as opposed to loading the entire library. This utility performs the same checks as dmlcheck, to ensure that the indexed models are syntactically correct. Only models that pass dmlcheck will be indexed.
Note: Index files are read-only. For this reason, you cannot index any library currently
designated as the working library to which SigNoise automatically writes any edits.
Use the mkdeviceindex utility to create a library index for one or more device model library files. You can access the mkdeviceindex utility from the Library Browser (Make Index button) or the command line.
To access the mkdeviceindex utility from the command line, enter the following command:
mkdeviceindex [-d] [-o <index_filename>] <library_filename>...
mkdeviceindex Command Arguments
Argument Function
-d Checks model dependencies. For example, an IBIS Device model is indexed only when all required IOCell and
PackageModel models are present and pass the checks. -o Names the device model library index.
index_filename Names the device model library index for the IBIS input file you want to translate.
library_filename Names one or more device model libraries.
Note: You can also specify directories which are
Merging Device Model Libraries
The mergedml utility enables you to combine one or more model libraries into a single library. You can access the mergedml utility from the Library Browser (Merge DML button) or the command line.
To access the mergedml utility from the command line, enter the following command:
mergedml <library_filename>... -o name
mergedml Command Arguments
Protecting Device Model Libraries
Use the dmlcrypt program to produce encrypted versions of DML files to protect model data. You can use encrypted files for simulation, but you cannot view them in plain text. The program requires the name of an existing DML file and the name of a new encrypted DML file to write. For example:
dmlcrypt devices.dml devices_e.dml
An encrypted copy of devices.dml is saved as devices_e.dml.
Caution
Once a file is encrypted there is no way to convert it back to plain text. Be careful to retain a copy of the original plain text DML file.
For further protection, add a SPICE comment to your EspiceDevice, MacroModels, or PackageModels as follows:
*|protect_simulation_files: comps.spc ibis_models.inc
Doing so will remove these files at simulation ensuring that no plain text copy of your data remains.
You can recognize an encrypted DML file by the characters at the beginning:
Argument Function
library_filename Names one or more device model libraries to combine. -o Names the merged output library.
The remainder of the file contains undecipherable binary characters.
Auditing Device Model Libraries
You can use the dmlcheck utility to check the syntax of one or more library files. For further details, see Auditing Models and Libraries on page 134.
Signal Integrity Model Libraries
The Cadence Libraries
The models in the Cadence Libraries fall into three categories:
■ DIG_LIB Library Models
Standard digital logic families containing 217 unique parts in a format directly compatible with the SigNoise simulator with their corresponding IBIS files. These models were created using spice files from Signetics (except for one device).
■ DEFAULT_LIB Library Models
Default set of IOCell models for gtl, pci, and asic types. You can use these IOCell models to select the right buffer for a given application.
■ PACKAGES Library Models
Library Structure
The Cadence Libraries are located in:
<install>/cds/share/pcb/signal/SignalPartLib
The directory contains the following sub-directories corresponding to the three categories:
■ DIG_LIB
Contains subdirectories corresponding to four digital logic families. Each digital logic family subdirectory contains files for IBIS Device models and IOCell models (.dml files). There is one device model in each file. The corresponding IBIS files (.ibs files) also exist. There is one DIGlib_assump.txt file giving the test setups used to validate each family.
■ DEFAULT_LIB
Contains signoise .dml files and their corresponding .ibs files. The corresponding assumption.txt file lists the assumptions, approximations and validation test setup used.
■ PACKAGES
Note: In the directory above the SignalPartLib directory, SigNoise uses the device
The DIG_LIB Library Models
The digital device model library supports models for parts from four types of digital logic families (or technologies). A part’s digital logic family refers to the different processes and implementations used in the manufacture of the parts used in integrated circuits. For
example, you can use bipolar transistor-transistor-logic, CMOS, bipolar emitter coupled logic, or a combination of several technologies. Each technology has different input and output parameters. The library includes the digital logic families described in the following table.
Digital Device Model Library
The DEFAULT_LIB Library Models
The following table describes the default set of library models.
Technology Description
ABT Advanced BiCMOS Technology for bus interfaces with high drive, lower power consumption, and fast propagation.
ALS Advanced Low Power Schottky for low power consumption in non-speed critical circuits.
ALVC Advanced Low Voltage CMOS for low power consumption.
FTTL Fast Transistor-Transistor Logic for speed critical circuits.
Technology Number of
IOCell Models Description
GTL 01 IOCell models derived from Texas gtl spice files.
PCI 04 Compatible IOCell models for both 3v and 5v derived from Intel pci spice files.
ASIC 22 IOCell models for different current capability both for 3v and 5v, with and without slew made from suitable approximations for the ASIC CMOS technology.
The PACKAGES Library Models
The default package models include:
■ 20dip ■ 14soic ■ 16soic ■ 20soic ■ 16ssop ■ 20ssop ■ 28plcc ■ 44plcc
For a complete list of models, refer to the <install>/share/pcb/signal/
cds_partlib.ndx file. You can search this file using the UNIX grep command or the Windows NT Find command.
Managing Models
Introduction to Simulation Models
There are two basic categories of models used to build circuits for simulation.
■ Device models
■ Interconnect models
Device models must be obtained in advance of simulation. You use them to characterize manufactured components such as ICs, discrete components, and connectors. They are stored in files with a .dml extension. A device model library consists of a .dml file that contains one or more device models.
Interconnect models are extracted directly from the physical design database and
synthesized on demand. Interconnect models cover such items as traces and vias, and are stored in files with a .iml extension.
Where to Obtain Device Models
You can procure or create device models to suit your design requirements. Choose from a standard parts library of Cadence models, procure models from the device manufacturer, translate IBIS, SPICE, or Quad models to SigNoise’s native format, or create your own models through cloning, physical test measurements, or information gleaned from databooks. You can also work with Cadence’s consulting services to obtain custom models based on your unique requirements.
Model Data Verification
Use the Model Editor and SI Model Browser to easily manage the integrity of the model data required for high-speed circuit simulations. For more information, see the Allegro Signal
The Cadence Sample Model Libraries
The simulation models are stored in device and interconnect model libraries. The Cadence sample device model libraries are named cds_*.dml and are located in:
<install>/share/pcb/signal
Tip
You can examine these files for important details regarding the format and syntax of device models as well as the structure of the device model library. The libraries contain examples of different types of device models and are well commented as shown in the following example.
Example
(IbisPinMap
(13 ; Pin 13 of this device. (signal "RAS0#") ; Signal name, not used.
(signal_model "CDSDefaultOutput") ; The IOCell model for this pin. (ground_bus gndbus) ; Attach IOCell ground pin to this bus. (ground_clamp_bus gndbus) ; If not present this defaults to the
; ground_bus value.
(power_bus pwrbus) ; Attach IOCell power pin to this bus. (power_clamp_bus pwrbus) ; If not present this defaults to the
; power_bus value.
(R 200m) ; Resistance, Inductance, and (L 5n) ; Capacitance for the pin-lead.
(C 2p) ; These are ignored if PackageModel is ; used, and defaulted to the
; EstimatedPinParasitics if not specified ; and no PackageModel is set.
(WireNumber 13) ; The WireNumber is only needed if a ; PackageModel is set and the pin-names
; are not numeric. The WireNumber maps ; a pin to an index in the PackageModel ; matrix. If the pin names are numeric ; and the WireNumber is absent then the ; pin-name is also assumed to be the ; WireNumber. In this example the ; WireNumbers are not needed, but ; included to show the proper syntax.
Device Models
Model Type Use and Relationship
IbisDevice Assigned to ICs and connectors with the SIGNAL_MODEL property. (An IbisDevice model for a connector has package parasitics but no IOCell models.)
IbisIOCell Referenced from an IBISDevice model. Used to model driver and receiver buffers at the pin level. The different types of IOCell models are:
IbisOutput – Driver model.
IbisOutput_OpenPullUp – Driver model with no pullup resistor. IbisOutput_OpenPullDown – Driver model with no pulldown resistor. IbisInput – Receiver model.
IbisIO – Bidirectional buffer model, which can drive or receive. IbisIO_OpenPullUp – Bidirectional buffer model with no pullup resistor.
IbisIO_OpenPullDown – Bidirectional buffer model with no pulldown resistor.
AnalogOutput – Models the behavior of an analog device pin. IbisTerminator – Models termination internal to the device pin.
PackageModel Referenced from an IbisDevice model. Models the package parasitics of the entire component package. Can be an RLGC matrix model or SPICE sub-circuits.
ESpiceDevice Assigned to discrete parts like resistors and capacitors with the SIGNAL_MODEL property. Contains SPICE sub-circuits.
System Configuration
Used to specify system-level connectivity, like multi-board or advanced package-on-board scenarios.
Note: System configurations created prior to release 14.0 of PCB SI
appear as DesignLink models.
Cable Referenced from a system configuration. Models cables
interconnecting multiple boards. Can be an RLGC model or SPICE sub-circuits.
BoardModel Referenced from a system configuration. Models entire boards for situations in which the physical Allegro database is not available. Contains SPICE sub circuits.
Interconnect Models
Use the Model Browser to create, display, manage, and edit the models in your libraries. The Model Browser dialog box functions and basic model development tasks are discussed in the following section. See Advanced Model Development on page 97 for information on using the model editors and on performing more complex model development tasks.
Model Type Use and Relationship
Trace Geometry-based model that represents a single transmission line with no coupling. A Trace can have frequency-dependent loss.
MultiTrace Geometry-based model representing multiple, coupled lossey
transmission lines. A MultiTrace can have a frequency-dependent loss.
Shape Models a copper shape encountered in a physical design.
Via Models the parasitics of a via providing z-axis connectivity between traces.
Basic Model Development
Basic model development tasks are handled through the use of the Model Browsers for Device Library files and Interconnect Library files.
To access the SI Model Browser from the PCB SI 1. Choose Analyze – Model Browser.
Figure 3-2 Model Browser Dialog Box
Using the Model Browsers you can perform the following basic model development tasks.
■ List the models in a library.
■ Create a device or interconnect model with default values or clone an existing device model and add the newly created model to the working library.
■ Delete a model from the working library.
Displaying a List of Models
Filter fields at the top of the Model Browser control which models are displayed in the Model Browser list box. You can specify which models are listed in the model search list by library, by model type, or by characters in the model name.
Creating Models and Adding Them to a Working Library
You can add a device or interconnect model to the working device or interconnect model library by copying (or cloning) an existing model or by creating a new model with default values. You must first create a device model before you can edit it to characterize a particular device.
To display a menu of models to add
✟ Click Add Model in the Library area of the Model Browser dialog box.
A pop-up menu of options is displayed for the currently selected model library type as shown in the following figure.
Figure 3-3 Add Model Menus
The following table describes the Add Model menu options for device model libraries.
Option Description
Clone Selection Copies the selected model from the Model Browser list box and adds the clone to the working library. You specify the name the clone.
EspiceDevice Displays the Create Espice Device Model dialog box.
IBISDevice Displays the Create IBIS Device Model dialog box.
PackageModel thru Connector
Opens a dialog box that prompts you to specify a name for the new model type.
Clicking OK then adds a template file for the model to the working library that you must edit to complete.
The following table describes the Add Model menu options for interconnect model libraries.
Note: When a new device model is added to the working library, the library check program
(dmlcheck) verifies the validity of the entry.
Deleting a Model
Click the Delete button to remove the previously selected model from the model list box. For further details on this dialog box or for additional procedures regarding model
management, refer to the signal_library command in the Allegro PCB and Package
Physical Layout Command Reference.
Option Description
Clone Selection Copies the selected model from the Model Browser list box and adds the clone to the working library. You specify the name the clone.
Trace thru Diff Pair CPW
Opens a dialog box that prompts you to specify a name for the new model.
Clicking OK then adds a template file for the model to the working