1.6 78K/0 Series Product Development
Remarks 1. The internal ROM capacities depend on the product
3. The initial value of this register is CFH. Set the following value to this register of each model
4.2 Port Configuration
A port consists of the following hardware.
Table 4-2. Port Configuration
Item Configuration
Control register Port mode register (PMm: m = 0, 2 to 6, 8, 9) Pull-up resistor option register (PU0)
Port Total: 56 (5 inputs, 16 outputs, 35 inputs/outputs) Pull-up resistor Total: 8 (software specifiable: 8)
4.2.1 Port 0
Port 0 is an 8-bit input/output port with output latch. P00 to P07 pins can specify the input mode/output mode in 1-bit units with the port mode register 0 (PM0). On-chip pull-up resistor can be used in 1-bit units with a pull-up resistor option register 0 (PU0).
Alternate functions include external interrupt request input, serial interface data input/output, and clock input/
output.
RESET input sets port 0 to input mode.
Figure 4-2 shows a block diagram of port 0.
Cautions 1. Because port 0 also serves for external interrupt request input, when the port function output mode is specified and the output level is changed, the interrupt request flag is set. Thus, when the output mode is used, set the interrupt mask flag to 1.
2. When port 0 is used as the serial interface pins, an I/O and output latches must be set according to the functions to be used. For an explanation of how to set these latches, refer to the description of the format of the serial operation mode register.
Figure 4-2. P00 to P07 Block Diagram
RD
P00/INTP0 to P02/INTP2 P03/SCK2
P04/SO2 P05/SI2 P06 P07 P-ch WRPUO
WRPORT
WRPM
PU00 to PU07
Output latch (P00 to P07)
PM00 to PM07
Selector
VDD0
Alternate functions
Internal bus
PU: Pull-up resistor option register PM: Port mode register
RD: Port 0 read signal WR: Port 0 write signal
4.2.2 Port 1
Port 1 is a 5-bit input only port.
Alternate functions include an A/D converter analog input.
Figure 4-3 shows a block diagram of port 1.
Figure 4-3. P10 to P14 Block Diagram
RD
P10/ANI0 to P14/ANI4
Internal bus
RD: Port 1 read signal
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4.2.3 Port 2
Port 2 is an 8-bit output only port with output latch. P20 to P27 pins go into a high-impedance state when the ENn of port mode control register (PMC) is set to 0 and the port mode register 2 (PM2) is set to 1.
Alternate functions include meter control PWM output.
RESET input sets port 2 to high-impedance state.
Figure 4-4 shows a block diagram of port 2.
Figure 4-4. P20 to P27 Block Diagram
P20/SM11 to P23/SM14 P24/SM21 to P27/SM24 WRPORT
WRPM
Output latch (P20 to P27)
Selector
Decoder PM20 to PM27
2 Alternate
functions
Internal bus
RD
DIRn1 DIRn0 MODn ENn
PM: Port mode register RD: Port 2 read signal WR: Port 2 write signal
Caution When PM2 is set to 0, read operation is enabled. When PM2 is set to 1, read operation is disabled.
Remark n = 1, 2
4.2.4 Port 3
Port 3 is an 8-bit output only port with output latch. P30 to P37 pins go into a high-impedance state when the ENn of port mode control register (PMC) is set to 0 and the port mode register 3 (PM3) is set to 1.
Alternate functions include meter control PWM output.
RESET input sets port 3 to high-impedance state.
Figure 4-5 shows a block diagram of port 3.
Figure 4-5. P30 to P37 Block Diagram
P30/SM31 to P33/SM34 P34/SM41 to P37/SM44 WRPORT
WRPM
Output latch (P30 to P37)
PM30 to PM37
Alternate functions
Internal bus
RD
Selector
Decoder
2
DIRn1 DIRn0 MODn ENn
PM: Port mode register RD: Port 3 read signal WR: Port 3 write signal
Caution When PM3 is set to 0, read operation is enabled. When PM3 is set to 1, read operation is disabled.
Remark n = 3, 4
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4.2.5 Port 4
Port 4 is a 5-bit input/output port with output latch. P40 to P44 pins can specify the input mode/output mode in 1-bit units with the port mode register 4 (PM4).
Alternate functions also include timer input/output.
RESET input sets port 4 to input mode.
Figure 4-6 shows a block diagram of port 4.
Figure 4-6. P40 to P44 Block Diagram
RD
P40/TI00 to P42/TI02 P43/TIO2
P44/TIO3 WRPORT
WRPM
Output latch (P40 to P44)
PM40 to PM44
Alternate functions
Selector
Internal bus
PM: Port mode register RD: Port 4 read signal WR: Port 4 write signal
4.2.6 Port 5
Port 5 is a 5-bit input/output port with output latch. P50 to P54 pins can specify the input mode/output mode in 1-bit units with the port mode register 5 (PM5).
Alternate functions include serial interface data input/output and clock input/output.
RESET input sets port 5 to input mode.
Figure 4-7 shows a block diagram of port 5.
Caution When port 0 is used as the serial interface pins, an I/O and output latches must be set according to the functions to be used. For an explanation of how to set these latches, refer to the description of the format of the serial operation mode register.
Figure 4-7. P50 to P54 Block Diagram
RD
P50/SCK3 P51/SO3 P52/SI3 P53/RxD P54/TxD WRPORT
WRPM
Output latch (P50 to P54)
PM50 to PM54
Alternate functions
Selector
Internal bus
PM: Port mode register RD: Port 5 read signal WR: Port 5 write signal
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4.2.7 Port 6
Port 6 is a 2-bit input/output port with output latch. P60 and P61 pins can specify the input mode/output mode in 1-bit units with the port mode register 6 (PM6).
Alternate functions include clock output and sound generator output.
RESET input sets port 6 to input mode.
Figure 4-8 shows a block diagram of port 6.
Figure 4-8. P60 and P61 Block Diagram
PM: Port mode register RD: Port 6 read signal WR: Port 6 write signal
RD
P60/PCL/TPO P61/SGO WRPORT
WRPM
Output latch (P60, P61)
PM60, PM61
Alternate functions
Selector
Internal bus
4.2.8 Port 8
Port 8 is a 7-bit input/output port with output latch. P81 to P87 pins can specify the input mode/output mode in 1-bit units with the port mode register 8 (PM8).
Alternate functions also include segment signal output of the LCD controller/driver.
Segment output and input/output port can be switched by setting the LCD display control register (LCDC).
RESET input sets port 8 to input mode.
Figure 4-9 shows block diagram of port 8.
Figure 4-9. P81 to P87 Block Diagram
P81/S19 to P87/S13 WRPORT
WRPM
Output latch (P81 to P87)
PM81 to PM87
Segment output function RD
Selector
Internal bus
PM: Port mode register RD: Port 8 read signal WR: Port 8 write signal
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4.2.9 Port 9
Port 9 is an 8-bit input/output port with output latch. P90 to P97 pins can specify the input mode/output mode in 1-bit units with the port mode register 9 (PM9).
Alternate functions also include segment signal output of the LCD controller/driver.
Segment output and input/output port can be switched by setting the LCD display control register (LCDC).
RESET input sets port 9 to input mode.
Figure 4-10 shows a block diagram of port 9.
Figure 4-10. P90 to P97 Block Diagram
P90/S12 to P97/S5 WRPORT
WRPM
Output latch (P90 to P97)
PM90 to PM97
Segment output latch RD
Selector
Internal bus
PM: Port mode register RD: Port 9 read signal WR: Port 9 write signal