Aside from Sigma-Alpha, two other algorithms were also tested:
1. sigma-beta wich controls the input bus capacitor and the output filter capacitor currents and generates sinusoidal current references based on the capacitance of the capacitor and the amplitude of voltage over it,
2. sigma-alphabeta which is a hybrid between sigma-alpha and sigma-beta and controls the input bus capa-citor current and the output filter inductor current.
Sigma-Beta Normal Regulation
The figures below show the module voltages and currents for regulation with the input bus voltage at 400 V, the load at 5 Ω load, and the module output voltage reference amplitude set to 350 Vp.
iCb
iCo
vload
vin
Figure C.1: Perspective view of the input capacitor current, iCb, the output filter capacitor current, iCo, the input bus voltage, vin, and the output voltage, vload.
The output voltage amplitude is seen to be on target and the currents are stable. The waveforms correspond well to the simulations.
170
iCb
iCo
vload
vin
Figure C.2: Close-up view of the controlled module state variables.
Sigma-Beta Reference Steps
References steps on the module output voltage reference were done on a high-impedance load (15 Ω) and a low-impedance load (5 Ω) with both upward and downward reference steps on each.
iCb
iCo
vload
vin
Figure C.3: Upward reference step on sigma-beta with 15 Ω load.
At the instance of the references step (Fig. C.3), some sharp transients are obseverved as the output voltage tracks the reference from 50 VRMSto 350 VRMS. The transients are seen to transpire in about 3 ms, whereafter the module remains in a stable state.
iCb
iCo
vload
vin
Figure C.4: Downward reference step on sigma-beta with 15 Ω load.
The downward reference step (Fig. C.4), exhibits much of the same performance as the upward step. The transient response can be controlled by adjusting the sliding coefficients of the sliding function. The overshoot and undamped behaviour can be reduced by decreasing the relative magtitude of the weight on the output votlage error. This however, was neglected, as it also increases the steady-state tracking error.
The upward and downward reference steps were also done on the lower-impedance load to see the transient performance with higher currents. This is shown in Figs. C.5 and C.6 below. The transient behaviour is seen to be much the same as in the case of the heavier load. The system maintains a fast response, good stability and good reference tracking.
iCb
iCo
vload
vin
Figure C.5: Upward reference step on sigma-beta with 5 Ω load.
iCb
iCo
vload
vin
Figure C.6: Downward reference step on sigma-beta with 5 Ω load.
Sigma-Beta Load Steps
The load step was between 5 Ω and 15 Ω, in both directions, on the maximum voltage that the 400V variac could yield.
iL
iin
vload
vin
Figure C.7: Load step from 5 Ω to 15 Ω.
Notice the invarience of the module output voltage, vload, as the load changes.
iCb
iCo
vload
vin
Figure C.8: Load step from 15 Ω to 5 Ω.
Sigma-Beta Source Steps
The source steps simulate a real-life undervoltage cinareo most accurately. The step was generated by switching a resistive devided in and out with a breaker. The supply was stepped from V to V and back with a 15 Ω load and a output voltage reference of 250 V. The 5 Ω load required too much current from the supply and exceeded the supply rating.
iCb
iCo
vload
vin
Figure C.9: Source step from 324 V to 410 V.
iCb
iCo
vload
vin
Figure C.10: Source step from 410 V to 324 V.
Sigma-Beta operating with a non-linear load
In this test, a rectifier load was connected to the module along with a15 Ω load. The capacitance of the rectifier capacitor was 15.6 mF.
iCb
iCo
vload
vin
Figure C.11: Sigma-Beta running on a rectifier load.
The fast fourier transform (FFT) of the module input and output voltages were taken in order to analyse the harmonics pushed back into the power network. The magnitude is on a linear scale and a Hamming window was used. Fig. C.12 shows the FFT of the module input bus voltage. The first peak at 50Hz has amplitude of 306 V and the second noteworthy peak at 150 Hz has an amplitude of 36 V.
FFTVin
vin
Figure C.12: FFT of the input bus voltage, vin, while the module is running on a rectifier load.
Fig. C.13 shows the FFT of the module output voltage. The first peak at 50Hz has amplitude of 242 V with small harmonics.
FFTVload
vload
Figure C.13: FFT of the module output voltage, vload, while the module is running on a rectifier load.
It is seen from the above two figures that the regulator does a fair job to regulate the output votlage to a sinusoid. The harmonics generated by the rectifier current is inevitably pushed back towards the input voltage.
The system nonetheless remains in a stable and operational state.
Sigma-Alphabeta Reference Steps
References steps on the module output voltage reference were done on a high-impedance load (15 Ω) and a low-impedance load (5 Ω) with both upward and downward reference steps on each.
iCb
iL
vload
vin
Figure C.14: Downward reference step on sigma-alphabeta with 15 Ω load.
iCb
iL
vload
vin
Figure C.15: Upward reference step on sigma-alphabeta with 15 Ω load.
iCb
iL
vload
vin
Figure C.16: Downward reference step on sigma-alphabeta with 5 Ω load.
iCb
iL
vload
vin
Figure C.17: Upward reference step on sigma-alphabeta with 5 Ω load.
Sigma-AlphabetaLoad Steps
The load step was between 5 Ω and 15 Ω, in both directions, on the maximum voltage that the 400V variac could yield.
iCb
iL
vload
vin
Figure C.18: Load step with sigma-alphabeta from 5 Ω to 15 Ω.
iCb
iL
vload
vin
Figure C.19: Load step with sigma-alphabeta from 15 Ω to 5 Ω.
Sigma-Alphabeta Source Steps
The source steps simulate a real-life undervoltage cinareo most accurately. The step was generated by switching a resistive devided in and out with a breaker. The supply was stepped from V to V and back with a 15 Ω load and a output voltage reference of 250 V. The 5 Ω load required too much current from the supply and exceeded the supply rating.