5.4.1 Line Unit
Address Default
NameDescription
0x0240 01 Cfg-1 Driver configuration 1Bit
0: FSK standard, 0=ETSI, 1=Bellcore 1: CasDetAlgoEnable, 0=disable, 1=enable 2: FskDecodAlgoEnable, 0=disable , 1=enable 3 : AnAgcMicGainCtrl, ANAGC mic-gain control, 0=by driver , 1=by GENDSP
4..5: FESelect, FrontEnd selection, 0=codec1 (CODEC_MIC/LSR)
6..7: Reserved
0x0241 31 PortCfg Port configuration
Bit
0: LowImpEnable, 1=enable pulse dial low-imp port (pulse) 1: HookRelayEnable, 1=enable hook-relay port
2: EarthBreakEnable, 1=enable earth-break port (earth) 3: ClipImpEnable, 1=enable clip-imp port (clipstate) 4: PolAEnable, 1=enable Pol-A adc-port (linesense) 5: PolBEnable, 1=enable Pol-B adc-port (rev_pol) 6: Reserved
7: Reserved
If any of these port-functions shares the same physical port then only one of them must be enabled.
0x0242- 0x0243
00 00 Reserved
0x0244 00 Reserved
0x0245 00 Reserved
Audio Settings 0x0246-
0x0247
02 00 LSB MSB
Audio.CodecMicONH CODEC_MIC_REG setting during on-hook state.
(SC14429: CODEC_LINE_IN_REG) 0x0248-
0x0249
51 00 LSB MSB
Audio.CodecMicOFH CODEC_MIC_REG setting during off-hook state.
(SC14429: CODEC_LINE_IN_REG).
0x024A- 0x024B
20 01 LSB MSB
Audio.CodecLsrONH CODEC_LSR_REG setting during on-hook state (SC14429: CODEC_LINE_OUT_REG) 0x024C-
0x024D 1C 1B
LSB MSB Audio.CodecLsrOFH CODEC_LSR_REG setting during off-hook state (SC14429: CODEC_LINE_OUT_REG)
0x024E- 0x024F
00 31 LSB MSB
Audio.DtmfGen.TwistAtt DTMF generator - twist attenuation. Low-group uses attenuation-factor 4000H. TwistAtt is the attenuation-attenuation-factor for the high-group.
0x0250-
0x0251 FF 7B
LSB MSB Audio.DtmfGen.TxAtt DTMF generator – attenuation (SUMM2) in the Tx-direction (towards PSTN line)
0x0252- 0x0253
FF 7B LSB MSB
Audio.DtmfGen.RxAtt DTMF generator - attenuation (SUMM1) in the Rx-direction (towards handset)
0x0254- 0x0255
FF FF LSB MSB
Audio.Agc2.AGClvl5 AGClvl5 for AGC2 (Tx soft-limiter). If AGCLvl5<0 then AGC2 is bypassed.
0x0256- 0x0257
00 20 LSB MSB
Audio. ToneGenTxAtt Tone generator - attenuation (SUMM2) in the Tx-direction 0x0258-
0x0259
00 00 LSB MSB
Audio.AnAgc1.clvlmin Clvlmin for ANAGC1
If both ClvlMin and ClvlMax are zero then the ANAGC1 is
disabled.
0x025A- 0x025B
00 00 LSB MSB
Audio.AnAgc1.clvlmax Clvlmax for ANAGC1
0x025C 00 Audio.AnAgc1.MicGainMi ANAGC1, Minimum bound for mic gain (range 0..F) 0x025D 04 Audio.AnAgc1.MicGainMa
x
ANAGC1, Maximum bound for mic gain (range 0..F) 0x025E-
0x0268 02 RingDet.CycleCntMin Ring detection, cycle-count – minimum number of ring-cycles required.
0x0269-0x026A
09 08 LSB MSB
RingDet.FreqCntMin Ring detection, max frequency FreqCntMin=144000/Fmax Defaults to 70Hz.
0x026B-
0x026C 2D 28
LSB MSB RingDet.FreqCntMax Ring detection, min frequency FreqCntMax=144000/Fmin Defaults to 14Hz.
DTMF detector 0x026D-
0x026E 04 01
LSB MSB DtmfDet.DtmfTrsHold DTMF detection, DTMF threshold level FSK DTAS/CAS detector
0x026F- 0x0270
48 01 LSB MSB
FskAtDet. DtasTrsHold DTAS detection, DTAS threshold level 0x0271-
0x0272 FF FF
LSB MSB FskAtDet. CasTrsHold CAS detection , CAS threshold level. If FFFFh then DtasTrsHold setting is used.
0x0273-
0x0274 00 00
LSB MSB FskAtDet. DAckAtt D-ACK signal, attenuation in the Rx-direction. If 0000H audio is completely muted.
FSK detector 1 (used if Cfg.1.FskDecodAlgoEnable=0) 0x0275-
0x0276
04 01 LSB MSB
FskDet. CdTrsHoldOnh FSK detection, CD threshold level when on-hook 0x0277-
0x0278
FF FF LSB MSB
FskDet. CdTrsHoldOfh FSK detection, CD threshold level when off-hook. If FFFFh use CdTrsHoldOnh.
0x0279 FF FskDet.CHSZDetOn FSK detection, minimum number of seizure patterns "01".
FFh=use hard-coded value
0x027A FF FskDet. MARKDetOn FSK detection, minimum number of mark patterns "11"
FFh=use hard-coded value (34 bits)
00h=use HW-support block for MARK detection FSK generator
0x027B-0x027C 2B 01
LSB MSB FskGen.CHSZ_Len
0x027D-
0x027E B3 00
LSB MSB FskGen.MARK_Len
0x027F- 0x0280
FF 7F LSB MSB
FskGen.FSK_Attn Call-Progress Tone detector
0x0281 01 CptDet.Cfg CPT detection , detection config
Bit1..0: Mode, 00 = use only the zero-cross CPT detector 01 = use both zero-cross CPT detector and
CptDet.Level CPT detection , signal threshold level (-36dBm) 0x0284-
0x0285
27 01 LSB MSB
CptDet.M0.FreqMin CPT detection mode 0, min frequency in Hz.
0x0286- 0x0287
85 02 LSB MSB
CptDet.M0.FreqMax CPT detection mode 0 , max frequency in Hz.
0x0288 0B CptDet.M0.IntegratorTime CPT detection mode 0, integrator on/off time in 10 ms steps
0x0289 30 CptDet.M1.DialTone CPT detection mode 1 , dial-tone frequencies Bit 7..4 : upper frequency
Bit 3..0 : lower frequency Frequency coding:
0 = 350Hz , 5 = 620Hz 1 = 400Hz , 6 = 1100Hz 2 = 425Hz, 7= 2130Hz 3 = 440Hz, 8= 2750Hz
4 = 480Hz F=use zero-cross CPT detector 5 = 620Hz
If both frequencies are programmed to same frequency then the single-tone detector is selected.
0x028A 54 CptDet.M1.BusyTone CPT detection mode 1 , busy-tone frequencies 0x028B 43 CptDet.M1.RingTone CPT detection mode 1 , audible ring-tone frequencies FSK detector 2 (used if Cfg.1.FskDecodAlgoEnable=1)
028C..8D FF FF
LSB MSB FskDecod.threshmin FSKDECOD parameter 6, adaptive threshold-value init-value (min). If FFFFh hardcoded default value is used (TBD).
028E..8F FF FF
LSB MSB FskDecod. attackcd FSKDECOD parameter 1, carrier sensitivity can be increased/decreased by changing attackcd.
If FFFFh hardcoded default value is used (TBD).
0290..91 FF FF
LSB MSB FskDecod. adaptmin_fac FSKDECOD parameter 5, SNR threshold.
If FFFFh hardcoded default value is used (TBD).
0292 23 FskDecod.
mark_deton_onh
FSKDECOD parameter 21, no of mark bits for valid MARK detection (on-hook)
If FFh hardcoded default value is used. If different from FF, markdet_ofh must also be set!!.
0293 18 FskDecod. mark_deton_ofh FSKDECOD parameter 21, no of mark bits for valid MARK detection (off-hook)
If FFh hardcoded default value is used. If different from FF, markdet_onh must also be set!!.
Reserved 0x0294-
0x0298
FF..FF Reserved4[5] Reserved
0x0299-
0x029F FF FF FF FF FF FF
F1
Reserved[7] Reserved
0x02A0- 0x02AB
- Reserved[12]
5.4.2 Plug/Pol detection
Address Default
NameDescription
0x02AC A3 PlugD.Option Plug/Pol detection options:
Bit 0 : Par, 1=detect parallel offhook, 1 = enable Bit 1 : Plug, 1=detect plug in/out, 0=disable plug in/out Bit 2 : CPC, 1=enable CPC, 0 = disable CPC
Bit 3..4: Unused
Bit 5 : Hw_PolAdc, pol-A+pPol-B adc's, 1=present, 0=not present Bit 6 : Hw_AgcAdc, AGC-adc , 1=present, 0=not present Bit 7 : Enable detector, 1=enable, 0=disable. Disabling the detector overrules all other options.
0x02AD 0A PlugD.IntegrateTime Integrate-time for detecting plug-in/out, line-reversal, and parallel-offhook. If FFh plug/pol detection is completely disabled.
Unit : 10 ms, defaults to 100 ms
0x02AE 20 PlugD.LvIdleAvgCnt Number of samples to use when finding the idle line-voltage LvIdle.
Unit : samples (rate 1/10ms), defaults to 32
0x02AF 0C PlugD.LvDetThresh Minimum voltage level in order to detect line-voltage / plug-in.
Range : 00..fe, ffh = disabled Unit : adc-steps.
Default setting correspond to:
LvDetThresh <<3V and LvDetThresh>2V.
2V ~0AH, 3V~0FH.
0x02B0 FF PlugD.LrDetThreshOnh Onhook: minimum voltage level in order to detect polarity.
Range : 00..fe, ffh = disabled Unit: adc-steps
0x02B1 53 PlugD.ParDetThreshOnh Onhook: threshold for detecting parallel-offhook.
Range : 01..ff, 00h = disabled Unit: adc-steps
Default settings corresponds to:
LrDetThreshOnh<<18V and LrDetThreshOnh>16V 16V~51H, 18V~5C.
0x02B2 FF PlugD.LrDetThreshOffh Offhook: minimum voltage level in order to detect polarity.
Range : 00..fe, ffh = disabled Unit: adc-steps.
0x02B3 FF PlugD.ParDetThreshOffh Offhook: threshold for detecting parallel-offhook.
Range : 00..fe, ffh = disabled Unit: adc-steps.
PolA/PolB HW : Default setting correspond to a delta-detection-voltage of 1V.
Line-Current HW: see above
0x02B4 28 PlugD.CpcMinDisTime Offhook: CPC detection, minimum line-current break time Unit : 10 ms, range 05..ff.
5.4.3 Line-AGC
Address Default
NameDescription
0x02B5 44 AGC.Ctrl Line-AGC control
Bit
0..2 : SLR steps, range 2-7 (0=disable SLR AGC) 3 : 0, reserved
4..6: RLR steps, range 2-7 (0=disable RLR AGC) 7 : Line-AGC, 1=enable, 0=disable
Notes:
1) If either AGC.Ctrl(7)=0 or AgcUpdateTime is FF, line-AGC is disabled and the line-line-AGC driver parameters does not matter.’
2) RLR steps/gain. The adjustment takes place in CODEC_MIC_REG.MIC_GAIN. Possible values for MIC_GAIN is 0..F with approx 2dB/step. If say 5 steps are specified for RLR the line-AGC will be allowed to adjust the RLR from [rlr_nom_gain ... rlr_nom_gain+10dB].
3) SLR steps/gain. The adjustment takes place in CODEC_LSR_REG.LSRATT. Possible values for LSRATT is 0..7 with approx -2dB/step.
0x02B6 30 AGC.Vmin Lower VAGC limit.
Unit: ADC steps.
0x02B7 81 AGC.Vmax Upper VAGC limit. Line-AGC adjustment is carried out from AGC.Vmin to AGC.Vmax.
Unit: ADC steps.
0x02B8 05 AGC.VHysteresis VAGC hysteresis
0x02B9- 0x02BC
- Reserved[4] Reserved by line-driver