Simulating O l d Com puters - dtj v08 03 1996 pdf

A

si m u la tor is a computer progr:1m opcr:

n

ing on one compute r s1·srem

(k11011

n as the host S\'Stem ) ll'hich mi mics the be ha,·ior of another computer S\'Stem (kno1111 ;ls the t:1rgct svsre m ) . The simulator's d at:l is the state of

rbe

target computer system-registers, memory, ri med e1·en rs, and so o n . The simulator oper J.tcs on presented state and transrcmns it

,

usually by scqucnti:1l Cl'aluarion, in the same manner as would the t;lrget computer system .

Simulators typically consist of an execution engine, ll'hich pcrt(mns the state transr(mnarions; J. simple rimed-event mechanism , which supports ddcrred and <1S\'1Kh ronous C\'Cnts such as

1/0

completions; and a control panel , ,,·hich provides user access to si m ubrcd state. The execution engine is responsible t(>r decoding

instructions i n simulated mcmon· and perr(mning the

spcci ried :�Iterations of sim u l:1ted machine state. The

exec

u

tion engine keeps track of simulated time in arbi

tr:ll'\' u nits, ll'hich n1av be precise representations of the

execution time of the targe t S\'Stc m, or simple: represen tations of ad1·ancing rime, such as the n u m ber of instructions executed . The CI'Cilt mechanism prol'idcs a wa1· to sched u l e events, such as l/0 completion,

t(>r

later c\·a luarion. It c:�n :�!so implement other time based mechanisms such as keyboard pol ling. Final ly,

the co

ntr

ol panel prol'idcs access to simulated state as well as basic control commands such as start and stop. It may also

provide

more elaborate f:1cilities to su pport pertormance instru mentation or debugging.

Historically, simulators have been used for nuny purposes, including the tc> l loll'ing:

• _{Design of nell' S\'Stems. The simu l ator mimics the} beha1·ior of a future chip or computer S\'Stem and is used to understand :�nd debug the beha1·ior of

the

proposed des

i

gn . For example , prior to tabricarion,

all modern microprocessors are extensively simu lated, fi rst as abstract pcrtcmnance models and then

at increasing levels of deta i l . '

• _Debugging_r()r_{embedded systems.}

If

_t_{he simu la} tor contains

fa

cilities tc>r program debugging, it becomes a usefu l rooJ for debugging programs that run in highly constrained envi ronments such as embedded systems. Simul<ltors can capture more state and pr(ll'ide a wider range of

facilities

than i n

s i t u de buggers. For ex:1mple, si m u lators can i m ple

ment program coumcr ( PC ) change q ueues, data access breakpoints, or precise traps on errors. • _{Replicable c1·ent tracing.}_{Most simu lators are fu l l\'}

deterministic. Asvnchronous el'ents are schedu led based on simple, nonrandom algorithms, such as tixed time-out or calculated seek time. As a result, simulators a l low rc>r

s

tra

i

ghtt

o

rward repl ication or playback of com pl icated sequ ences, removing the randomness

rac

tor that often plagues the debug ging of asynchronous software on real systems. • Preserl'ation of past software . Simulators can pro

vide migration assistance in rbe transition fi·om older to ne"'er architectures. Manv transitional computer systems hal'c prm·ided simu lators tor older archi tectures, typic11lv at the microcode lel·el, ro assist customers <md de1·clopcrs in preservi ng their im·est ments in the previous architecture . Exam ples

include

the early I B M Svstem/360 series, ll'hich had models thJt simulated

th

e 1 4 0 1 , 1 4 1 0, 7070, :1nd 7090 tamilies, and the early Digital

VAX

systems, which included a

PDP- l l

compatibility mode "'·"

Simulation Levels

Simul ators em be wr

i

tten at l'arious levels of detail and thus l'arinus l evels of tidelitv to the target svstem . Three common

.len:

Is o f simu lation are register tr;lns fer ln el ( RTL) , i nstruction, and software specitic.

An RTL sim u b tor attempts to mimic the major hardware blocks of the target S\'Stem and to i m pl e ment its actual logic equations. The goal i s absol u te

tidcli ty, the test of ll'hich is that 110 _{11iccc of softll'�lrL·} r u n n i ng on the simulator should bch<ll·c d i Fii..:remh th:m it II'Ould on the target hJrd ii'Jrc. I n practice, such pcrkct mi micn· is d i fric u l t to �K h i n c , JS i t req u i res �� p�1 insoking rc-ne�1tion of timing dcr:� i l ( t(Jr n�unpk, the actu a l accc lcr;Hion cun·c of <1 ]) 1-:C :ra11e srm:�gc s1·stc m ) and access to impkmcn ta tion docu1ncm�1tion th<H has oti:cn ,.,111ishcd . Nonetheless, some � i nl l l i <ltors ha1 c achie1 ed results 1-cn· close to this gml : M I NI I C, a DEC:SI'Stcm - 1 0 s i m u l ator 11rittcn <H Applied D�lt<l Rcsorc h , 11·as able to r u n C : l'l1- <111d dc1·icc-spcc i tic d iJ.gnostics. ( As tcsti mon\' to the

l't i l llCI'<l hiJ in·

of computi ng's f1ast, all mac h i n c - rca<hhk copies of the lvl li \11 / C : somccs :�ppcar to ha1·e been lost. )

An i nstruction s i m u lator srq1s b:�ck ti-om the 1\T l . ln·cl :�nd tries to s i m u l ate at the fu nction:� ! or the bcl1a1·ioral k1TI. Svstcm clcmcms arc rrcncd

<lS

fu nc tions th<lt tr<lnst(xm st;Hc <Kcord ing to rhc <l bsn·acr dcti n i tions of the s1 stem <lrch i rccru rc , r<lthn th<l n <lS logic blodzs th:�t tr:�nst(mn stare b<1scd 0 1 1 i m p l c memation t:qu:�tions. I nstruction simuLnors S<�criticc abso l ute ndciitl· to the id iOS\'11C1'.1SiCS (lf �1 p<1 1'ticu l �1r i m plement:�rion :�n d t(>Cus on the i n tentions of rhc arc h i tecture spccitic:�tio n . As <1 _{res u l t, i nstruction s i m} ulato rs can usua l h- run s1·srems softii'JIT <Uld applica tions but can rare II· t(ml d iagnostics.

Finalil·, a sofu,·arc-spccitic simubtion ti1rthcr abstracts rht: ti.1ncrions of the target s1·srcm to on II· those needed

L11' J particular piece of t:�rgct s1·srcm soful'<lrc .

For example, the OS/8 _{operating S\'stcm 0 1 1 the}I)DP-1'\

computer docs not usc program i nrcrr U f1ts; a simu bror <1imed at running onlv the OS/8 _{opccni ng s1·srcm}

ll'ould not need to implcmem imerrupts or Cl'cn queued el'ents. A recellt PrW- 1 1 _{sim u l ator designed to}

run rile 2 .9 BSD _UN I_{X opcr:tring S\'Stcm <1bsrr�Ktcd}

p:u-rs of th_e_{PD l'- 1 1}_{s1·srem 's i n terrupt model and cou l d}

nor run other I'DP- 1 I operating S\'Stcms.'� Simulating Minicomputers: A Case Study

S I M is J porr:�blc instruction- lncl m i n icomputn sim ulator implemented in C. I ts objccti1-cs <1rc to bciliratc rile studv �111d usc of h istoric computer arc h i tectures 111' 111�1 ki n g simu lated implementations and historic soft II'Jre available to an\'Onc ll'ilo h<1S a 32-bit compute!'. 1t supports tilt: folloll'in g target :�rch i tccturcs

• PDP-8 • P D P- 1 1 • Nova

• _{1 8 -bit P D P scrics ( PD P-4, PD P-7,}I'D I'-9, I'DP-1 5 ) and h <1S been successfull\' ported to the VAX VMS, the Alpha OpcnVMS, the Digita l U N I X , _{and the}Li1H1x architectures. Ports to the vVi nd oll's NT _{;md the} Wind oil'S 9 5 architectures and to <111 l i� M J 40 l s i m u

l atcJr arc u nder 11'�1\'.

\'ol � :---: r > 3 l l! %

General Design Considerations The design of Jn instruction-lcl·d sim u lator is not tec lmiu l l l- comp l i urcd ; i ndeed, simuLning �1 I'D P- 8 _{S\'Stcm i s J common} problem in u ndcrgradu:�rc computer science courses. Sl M t(>llo11·s t h e processor-mcmon· s11 itch ( PMS ) srructllrc proposed lw Bell and

Ne11·cll

a n d _implc memed i n M I M I C :tnd cou n tless other simubrors si nce -"'·'' The s i m u l ;ncd SI'Stcm is :1 col l ection of dc1 iccs, one of 11 h ich has Sf1Cci�l l propcrtiL·s ( the C P U ) . L1ch dc1·icc h<1S sLHe ( rq;istcrs ) :�nd one or more u nits . Each u n i t h;1s SL1tc J n d ti xcd- or l·ariablc sizcd storage. In the C P U de1 icc, the sroc1gc is 111<1 i l1 m emo1'1'. I n �1n I/0 _{dc1·ice, the storage is the d e1·ice} mcd i;1 . The C I' L: is d isri ngu ished t!·om other d c1·iccs

b1·

ha1 ing the J11<1Stcr routine for i nstruction nccu rion . This routi nc is responsible t(Jr the seq uentia I t:l a 1 - u:�tion ofinstructions a nd

t(x

the sure tcuJst(mn<Hions that represent si m u l:�ted e xecution. The C : PL1 also pro ' ides <1 k11 S\'StClllll·idc rou ti nes, such as s1·mbolic d is <1sscm hll· ;md i n 11ut :�nd J bin<ll'l' l o:tdcr.

The dc1 ices i mnt:lcc to a comro l panel that pro ,·idcs ,Kcc.ss to si m u i <Hcd stJtc and comrol 01-cr execu tion . The ,11 <1 i bblc commands in S !J'I'l _{arc listed in} Table S .

The comro l p;mcl :�!so i ncludes routines tiLlt ��·c needed lw most s i m u i ;Hors, sucl1 as e1·cm queue main ruwKc .u1d ch;1r�Ktn- b,·-ch:Jr:�crn ter m i n a l J/0 . Difri.:rcnr sim u laro rs need not use the s:�rnc rime b�1se, bur all the S l •\ l -b�1SL'll i mplement<1tions ro date usc rhe n u m hn of i nstructions execu ted as the rime base.

Note thJt the (Olltl'O) p:�ncl l)rO\·ides r(Jr srarring sim u l ;ltion , hut tnmil1<1tion is d etermined t:llti rc l v [)I' the simuLncd C P U . B1· con1·cmion , the CPU returns con rml to

rile

comrol p<111cl u nder tiJC t(JI !oll'ing cond itions:

I . ! f a H A l T instruction is nccutcd 2. I t. a t:n�1l exception is detected 3. ! f a bt<1 1 f/0 _{errm is detected}

4. I f J spcci;1l ch;1ractcr is n·ped ;\t the controlling terminal

I .ikcll'ise, the comrol p�111cl docs nor i mplement anv debuggi ng bci l itics bcvond sure e x a m ination and mod i tiution �1nd i nstruction stepping. To t3c i l i rate d ebugging ll'ith Of1CI'Jti ng systems, C l'Us pro1·ide :1 simple i nstruction brcakpoi m capa bi lity <111d ;1 one b·cl I)C tLlcc bci l i ty.

Implementation The im plemenorion of a parricu L1r simubtor hegi ns ll'ith col lecti ng reference manu�1 ls, m;1intcnancc m:� n u :� l s , design docu me nts, fol klore, and prior s i m ul:� to r i m plementations t(lr the target wstc m . This is nomrivial . ln rhc carl\' d,l\'S of com pu r ing, con111<1nics d i d n or S\'Stcmariul ly col lect ;md ;1rchi1·c design documcnution . I n a d d i tion , collected nLHcrial is su bject to i n tcmn;Hion dec\\', :�s n oted

Table

5

Commands Ava i l a b l e i n S I M

Com mand Definition

Associate f i l e with u n it's m e d i a . attach < u n it> <fi le>

detach <un it> I ALL reset <device> I ALL load <fi l e>

D isassociate u n it's (a l l u n its) media from a ny f i l e . Reset d evice (a l l d evices).

Load b i n a ry progra m from f i l e .

boot < u n it> Reset a l l d evices a n d bootstra p from u n it. run {<new PC>}

go {<new PC>}

Reset a l l d evices and resume execution at the cu rrent PC {or n ew PC}. Resume execution at the cu rrent PC {or n ew PC}.

cont Resume execution at the current PC.

step {<n u m be r>} exa m i ne < l ist> iexa m i ne < l ist>

Execute one i nstruction {or n u mber i nstruct ions}. D i splay contents of l ist of mem ory locations or reg isters.

D isplay contents of l ist of mem ory locati o ns or reg i sters a n d a l low i ntera ctive modificat i o n .

d eposit <l ist> <va l ue> ideposit < l i st> save <fi l e>

Store va l u e i n l ist of memory l ocati o ns or reg i sters. I nteractively mod ify l ist of memory locations or reg isters. Save s i m u l ator state in fi l e .

restore <fi l e> Restore s i m u l ator state from f i l e . show q ue u e D isplay the s i m u l ator's event q ueue. show configuration

show t i m e

D isplay t h e s i m u l ator's configuration. D isplay the s i m u l ated time counter. show <devi ce> Show device's confi g u ration options. set <devi ce> <option>

help

Set a d evice configuration opt i o n . D isplay a terse h e l p message. exit I q u it I bye Leave the s i m u lator.

earlier. Llsrl1·, the marcri.1l is li kcl\' to be contrJd ictory,

cm hod1

·

i ng d i frcring I"C\ is ions or 1nsions of the archi rc

ct

ui"C , <1S 11 c l l as errors rhar ha1-c ncpt i n during the documcnt <Jtion process.

For Digital's 1 2 - h i r and 1 6 -bir m inicomputers, the t\' pical h ierarch\· of documcntJtion II'JS the tol

lo

ll'ing: • Processor H <l m1 book. Prm iding <111

all-inclusi\'e

sumnJ<ll'\' of the i nstruction set <Jrchirccture, p

e

riph

CLJis, bus i nrcrbcc, <ln d soft:11 arc, these paperback

size books <Jrc tl1c most common

tim11

ot' S\'Stem

c

u mcmation but <liso the least accmatc .

• Su hs\'stcm Rcrcrcncc JVbnual . As the progra mmer's

rekrcncc ll1<111UJI t(>r a pJrticular su bs\'stem, such as the C l'U or rhe d isk d ri1·e, these mJnuals describe the registers :md rLI IKtions :�ccuratcly but omit maimcn:mcc-lcvcl katmes and other ti ne poi nts.

• Su bsvsrem NL l i n tell<Jncc M a n u a l . As the mainte nance engineer's 111<111U<l i tc1r J p<lrticu!Jr

s

ubsy

st

em, these lll<111U<1is descri be rile regi

st

e rs and fun

c

tions

<lt the h<Jrdll'are implcmcnt:�tion b·e l , often in

c

lud i n g su hstamial abstr<lCts ti·om the print set. Because

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