Software

With the new hardware components described in Section 3.1, the software in the CubeSat

SDR system requires more functionality. Specifically, the loss of the FX2 USB2 controller

requires that the FPGA handle all of the data coming into and leaving the system. The

FX2 USB2 controller contained a modern 8051 microprocessor, a full USB2 controller with

direct memory access (DMA), RS232 controllers, and controllers for the SPI and I2C buses.

The USB3300 chip that replaced it on the CubeSat SDR system contains only a partial

USB2 controller.

Figure 3.5: Block diagram of the proposed CubeSat SDR firmware. The MicroBlaze pro-

cessor acts as the central control for all of the various communications blocks.

center of the system is the MicroBlaze softcore microprocessor. This processor acts as a

traffic mediator, guiding data between the USB2 port to the various other devices in the

system. The SPI and I2C controllers provide users with a means of sending configuration

information to the USRP and to the RF daughtercards. One of the RS232 controllers

connects to an serial port on the board; the other connects to the AT90, which controls the

ASIM for the device. The other components simply control the peripherals that give them

their names (e.g. the DDR2 Memory Controller controls the DDR2 memory). Not shown

in Figure 3.5 are the general purpose I/O modules for the LEDs.

This design has many advantages. First, it uses well-tested components from Xilinx

including the DDR2 memory controller, the SPI and I2C controllers, and the MicroB-

laze microprocessor. Second, the Embedded Development Kit (EDK) software from Xilinx

provides users with a relatively simple way to design MicroBlaze-based systems for custom

hardware. With a Xilinx Board Description (XBD) file, one can quickly create new projects

that contain controllers and connections for all of the hardware devices on the FPGA board.

Appendix B contains the XBD file for the CubeSat SDR system. Finally, using a MicroBlaze

processor to control the system allows one to write much of the logic in the C programming

language. VHDL, as its name implies, was designed to describe hardware. Complex control

systems can be very difficult to design in VHDL, but those same systems might be relatively

simple when described as C programs.

This proposed system does have two drawbacks. The majority of the components only

work with the Xilinx toolset, so the system loses its platform independence. The Altera

toolset has similar devices, such as the NIOS II processor, but these are not compatible with

the Xilinx toolset. Thus, anyone wish to use the new USRP firmware in a larger system

with Altera’s tools could not use this proposed system. In addition, the USB2 controller

is currently priced at $14,000 [22], a prohibitive cost for smaller organizations. Xilinx does

offer free trial licenses, but a full license is necessary to operate the system without the

JTAG connection.

The proposed CubeSat SDR system should be compatible with GNU Radio with little,

if any, modification. With proper configuration, the USB2 controller and the other devices

in the system should be functionally equivalent to the original USRP design. To accomplish

this, users should consider two things. First, GNU Radio attempts to reprogram the FX2

USB2 controller and the FPGA every time it runs an application. For the CubeSat SDR

system, this behavior is not desirable. Since GNU Radio is open source software, it should be

easy to bypass this functionality. Second, the USB2 controller should be configured for the

same three endpoints that the original USRP used. Table 3.1 describes this configuration

[40].

Table 3.1: USB endpoint configuration for the CubeSat SDR.

Endpoint

Function

DMA

0

Control, SPI, I2C

No

2

Tx Data to USRP

Yes

6

Rx Data from USRP

Yes

3.3

Chapter Summary

This chapter describes the differences between the USRP hardware and the CubeSat

SDR system hardware. In addition, this chapter presents a proposal for a firmware that

incorporates the new USRP adaptation into the overall CubeSat SDR system and explains

the advantages and disadvantages of such a system. With the proposed firmware, the

CubeSat SDR system should be compatible with the GNU Radio software, providing users

with an easy way to test functionality.

Chapter 4

Proposed USRP Variant

This chapter introduces a new USRP firmware that is better suited to the needs of the

CubeSat SDR system. This new firmware is functionally equivalent to the original USRP

firmware, but does not rely on any platform-specific logic, benefits from VHDL’s strong

typing, and contains significantly more documentation. It is compatible with the original

USRP system and the COSMIAC CubeSat SDR system.

4.1

Proposed USRP Firmware

While its advantages are numerous, the original USRP firmware has several drawbacks.

First, it only works with Altera FPGAs and Altera tools. Second, it is written entirely in

Verilog. Finally, it contains very little documentation. This chapter proposes a new USRP

firmware that:

• Works on Xilinx FPGAs. In fact, this new USRP firmware works on any FPGA

large enough to support it, including those from Altera. In addition, there are no

proprietary components and so the design should work with any toolset.

• Is written in VHDL. The VHSIC Hardware Description Language (VHDL) is a stan-

dard for government, military, and other public sector projects. In addition, VHDL

is a strongly typed language. That is, it uses explicit data types and conversion

operations. As a result, VHDL offer an additional layer of safety in the design phase.

• Contains extensive documentation. One of the benefits of open source software is that

other parties can modify and extend it to fit their own needs. However, working with

another person’s code can be very difficult when that code contains little or no docu-

mentation. The original USRP firmware contains extensive high-level documentation

on various websites, but the actual Verilog contains almost none. The proposed USRP

firmware contains extensive documentation in the VHDL files.

This new USRP firmware will provide for easier integration with other government and

military applications, will allow future engineers to modify and extend it with ease, and

will work on a larger collection of FPGA devices than the original. The USRP firmware

contains almost all of the digital signal processing logic in the system as well as glue logic

to control AD9862 mixed signal processor and the USB2 controller. These elements require

a sufficiently powerful FPGA.