Summary of Grid Synchronization Methods

4) Dead-Beat Controller: The dead-beat controller tries make the error insignificant with one sample delay. The controller in its digital application is as expressed as:

𝐺

=

∙

1−𝑎𝑧−1

1−𝑧−1 (2.21)

where a and b are represented as;

𝑎 = 𝑒

_𝑇

𝑏 =

𝑇

(𝑒

−𝑅𝑇

𝐿𝑇

_𝑇

_{− 1)}

The controller employs one sample time delay since dead-beat controller controls the current in such a way that it can reach its reference at the completion of the subsequent switching period. The delay can be compensated for by employing an observer in the structure of the controller, so that the current reference can be modified to compensate for the delay. The discrete transfer function of the observer is expressed as:

𝐹

=

1−𝑧−1 (2.24)

therefore, the new current reference is given as:

𝑖

_{= 𝐹}

𝐷𝐵(𝑎𝑏𝑐)

(𝑖

− 𝑖)

As a result, a very fast controller with no delay is achieved. In addition, it is acceptable for microprocessor-based application since the algorithms of the dead-beat controller and observer are quite simple (Mohamed & El-Saadany 2007; Blaabjerg et al. 2006).

2.20 Summary of Grid Synchronization Methods

As regards to the standards in this specialty, the current introduced into the utility network has to be synchronized with the grid voltage. As a result, in distributed power generation systems (DPGSs), the grid synchronization procedure plays a significant part. The control variables such as grid currents with grid voltages using other transformation modules like ABC to dq are synchronized by the synchronization algorithm which produces mainly the phase of the grid voltage vector. Various approaches of extracting the phase angle have been established and shown in many

works till date. The relationship between the major methods used for identifying the phase angle of the grid voltages on various grid conditions was carried out in (Timbus et al. 2005). Benefits and drawbacks in addition to an evaluation of performance were also identified (Blaabjerg et al. 2006).

2.20.1 Grid Voltages Filtering Technique

As shown in Fig. 2.20a and 2.20b below, filtering of the grid voltages in different reference frames such as dq or αβ is an alternative option. The filtering method runs into a huge challenge extracting the phase angle when grid variations or faults arise in the utility network, even though it has been reported as an improved performance over the zero-crossing method. To get the phase angle of the utility voltage in this technique, it involves the use of the arctangent function. A delay is introduced in the processed signal in using filtering generally. It is not adequate in a situation where it is used for extracting the grid voltage angle. Therefore, it is necessary to design a suitable filter (Sangita Nandurkar & Rajeev 2012; Blaabjerg et al. 2006) (Timbus et al. 2005).

Figure 2.20a Synchronization method using filtering on the dq synchronous rotating reference frame

Figure 2.20b: Synchronization method using filtering on the 𝜶𝜷 stationary reference frame

a)

2.20.2 Zero-Crossing Technique

The zero-crossing technique is the easiest to implement among all the methods; Just like the grid voltages filtering technique, performances are also reported not be impressive when applying it, mostly if deviations are registered by grid voltages e.g. harmonics or notches.

2.20.3 PLL (Phase-locked loop) Technique

The PLL technique is the advanced method of extracting the phase angle of the grid voltages in recent times. Grid synchronizations is very essential in grid connected systems. The output frequency and phase of grid voltage is synchronized with grid current using different transformation. There are a number of approaches to extract phase angle which has been established. One signal can track the other when PLL technique is utilized. The output signal is maintained and synchronized with a reference input signal in frequency and phase. PLL can be employed using the dq transformation and adequate loop filter design in a three phase grid-connected system. The PLL is employed in dq synchronous reference frame, which can be seen in the representation in Fig. 2.21 below. It can be observed from this structure that it requires the coordinate transformation from ABC to dq, and by setting the reference to zero, the lock can be achieved. A PI regulator is commonly used to control this variable, and the frequency of the grid is the output from this regulator (Umland & Safiuddin 1990). The utility voltage angle is derived after the integrating the grid frequency and this is supplied back into the αβ to dq transformation block to transform into the synchronous rotating reference frame. This procedure has a better rejection of different types of disturbances such as grid harmonics, notches etc. however, to resolve the problem unbalance in the grid, further improvements have to be made. The second harmonics generated by the negative sequence will transmit through the PLL system when the voltage faults are not balanced and will have an effect on phase angle that was extracted. A number of filtering methods are required to resolve this issue, thus filtering out the negative sequence. The PI loop filter is a low pass filter. It is used to override high frequency component and supply a controlled DC signal to voltage controlled oscillator (VCO) which serves as an integrator. The inverter output frequency that is integrated to get the inverter phase angle ‘θ’ is the PI controller output. PLL becomes active when the difference between grid phase angle and inverter phase angle is decreased to zero leading to synchronously rotating voltages Ud = 0 and Uq which is the magnitude of grid voltage. The three phase dq PLL configuration can therefore evaluate the phase angle of the positive sequence of the grid voltages when there is unbalanced situations

(Sangita Nandurkar & Rajeev 2012; Blaabjerg et al. 2006; Timbus et al. 2005; Pádua 2005).

Figure 2.21: Representation of three phase dq PLL method