System Reconfigurability

Reconfigurability is built-in to several layers of this BAN system and reconfigura-bility options have varying levels of complexity. The parts of the BAN system that can be reconfigured are listed below in order of increasing complexity; FPGA Server User Software, Network topology, Digital Transmitter Firmware, ECG Mote sensor and FPGA Server hardware. A discussion of each of these follows.

4.4.1 FPGA Server User Software

Modifying the user software on the FPGA Server enables the user to change how the received data is processed. For example, in this research three versions of user software were used to: (1) record raw ECG data; (2) measure and record R-R intervals; and (3) identify PCVs. In other applications the user software could be modified to signal an insulin pump when blood sugar reaches dangerous levels or to

classify movements in a person wearing accelerometers. The key advantage that makes reconfiguration of the user software on the FPGA Server relatively straight-forward is the use of an operating system.

Figure 4.28 Removal of Baseline Drift in y[n]

The operating system provides a layer of abstraction so that the user does not need to know all of the system details in order to change the way the system processes the data. In order to modify the user software the user requires: (1) a cross-compiler for compiling C programs that will be launched by a uClinux OS running on a Nios II processor; (2) the ability to program using the C language; and (3) basic knowledge of Linux system calls. Once the user software is compiled the executable file is placed on the FPGA Server SD card and run automatically during the uClinux boot sequence.

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4.4.2 Network Topology

In the current design there is one mote and one server. These network nodes are connected in a point-to-point topology and ZigBee is used for RF communications.

The addition of motes may demand the use of a mesh network. Migrating to a mesh network would require reconfiguration of the XBee radio and the user software on the FPGA Server. This reconfiguration option requires an additional step compared to reconfiguring user software but remains relatively straight forward.

4.4.3 Digital Transmitter Firmware

Modifying the Digital Transmitter firmware enables: (1) the use of different ports or peripherals on the microcontroller; (2) the use of different types of sensors and/or actuators; (3) changes to sample rates and/or communication rates; and (4) prepro-cessing of sensor data. Examples of why each of these are a benefit follows.

(1) and (2) are benefits because they allow the system to be reconfigured for other applications. For example, body temperature may be used to identify the onset of infection. There are common integrated circuit temperature sensors that use I2C or SPI to interface to a microcontroller. The current firmware design of the Digital Transmitter does not allow the use of I2C or SPI but can be configured to use these ports.

(3) The ability to adjust the sample rate of an ADC is obviously very important when changing the sensing application. For example the current design uses a sample rate of 250 samples/s. A sensor that measures blood sugar may require a much lower sample rate. Timer settings on the microcontroller can be adjusted to accommodate this.

(4) Allowing for preprocessing of the sensor data adds value in several areas: For example, data compression could be applied to applications that require higher data rates, such as video or audio; advanced error detection and correction algorithms could be added; and interesting events could be identified at the mote, reducing the

transmission bandwidth. These are just a few of the possibilities made available by preprocessing the data.

In order to modify the Digital Transmitter firmware, in-depth knowledge of the microcontroller is required. In addition the designer would require knowledge of C programming and other technical aspects, such as the details of the I2C communica-tion protocol, for example.

4.4.4 ECG Mote Sensor

The ZigBee Mote was made to be modular to allow for different sensor boards to be designed and used with this BAN system. Depending on the design and applica-tion, changing the sensor board may or may not also require changes to the Digital Transmitter firmware. Knowledge of sensor processing circuitry as well as Printed Circuit Board design are both required to develop new sensor boards.

4.4.5 FPGA Server Hardware

Allowing for reconfigurability at this level facilitates significant changes to the BAN system. For example, the RF communications technology could be changed to Bluetooth, upgraded to include WiFi or the external storage media could be changed to a USB memory stick.

Reconfiguring the FPGA Server hardware is a complex endeavour but not nearly as difficult as it would be without the use of an operating system. For example, suppose that the removable storage media is to change to USB memory. The following steps are required:

1. Create a modified schematic for the DE0-Nano Daughter Board, including the USB memory.

2. Layout and build the PCB.

3. Populate the PCB.

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4. Reconfigure the Nios II processor in SOPC Builder to include a port for the USB memory.

5. Modify the Quartus II project to include the instantiation of the USB memory and pin assignments.

6. Recompile the uClinux distribution after including the drivers for the USB memory port.

7. Modify the uClinux start sequence to mount the USB memory during the boot sequence.

In order to accomplish the above without significant difficulty the designer should have a solid understanding of the overall system, including the software packages required to develop the system. Even then, reconfiguring the FPGA Server hardware is complex. However, if the FPGA Server was designed a built without an operating system this task would be much more involved. USB is a complicated communication standard that requires a significant amount of study to become proficient in. The OS successfully abstracts the details of configuration, read, write and protection of the external memory making this task mush easier than without the OS. The same is true for other peripherals such as SPI, I2C and RS232. Appendix A should be used as a guide to modify the FPGA Server hardware.

Practically speaking, all of these reconfigurability options could not be fully demon-strated in this work. Chapter 5 includes a description of the verification results as the user software was reconfigured.