Operands Operator Trap Doubleword TO,RA,RB td if equal RA,RB tdeq if not equal RA,RB tdne if greater than RA,RB tdgt
if greater than or equal RA,RB
tdge
if not greater than RA,RB
tdng
if less than RA,RB
tdlt
if less than or equal RA,RB
tdle
if not less than RA,RB
tdnl
if logically greater than RA,RB
tdlgt
if logically greater than or equal RA,RB
tdlge
if logically not greater than RA,RB
tdlng
if logically less than RA,RB
tdllt
if logically less than or equal RA,RB
tdlle
if logically not less than RA,RB
tdlnl
Trap Doubleword Immediate TO,RA,SI tdi if equal RA,SI tdeqi if not equal RA,SI tdnei if greater than RA,SI tdgti
if greater than or equal RA,SI
tdgei
if not greater than RA,SI
tdngi
if less than RA,SI
tdlti
if less than or equal RA,SI
tdlei
if not less than RA,SI
tdnli
if logically greater than RA,SI
tdlgti
PowerPC Assembler Instructions 113
if logically greater than or equal RA,SI
tdlgei
if logically not greater than RA,SI
tdlngi
if logically less than RA,SI
tdllti
if logically less than or equal RA,SI
tdllei
if logically not less than RA,SI
tdlnli
Translation Lookaside Buffer Invalidate All tlbia
Translation Lookaside Buffer Invalidate Entry RB
tlbie RB,L tlbie
Translation Lookaside Buffer Invalidate Entry Local RB
tlbiel
Load Data TLB Entry (603 specific) RB
tlbld
Load Instruction TLB Entry (603 specific) RB tlbli TLB Synchronize tlbsync Trap Unconditionally trap Trap Word TO,RA,RB tw if equal RA,RB tweq if not equal RA,RB twne if greater than RA,RB twgt
if greater than or equal RA,RB
twge
if not greater than RA,RB
twng
if less than RA,RB
twlt
if less than or equal RA,RB
twle
if not less than RA,RB
twnl
114 PowerPC Assembler Instructions
if logically greater than RA,RB
twlgt
if logically greater than or equal RA,RB
twlge
if logically not greater than RA,RB
twlng
if logically less than RA,RB
twllt
if logically less than or equal RA,RB
twlle
if logically not less than RA,RB
twlnl
Trap Word Immediate TO,RA,SI twi if equal RA,RB tweqi if not equal RA,RB twnei if greater than RA,RB twgti
if greater than or equal RA,RB
twgei
if not greater than RA,RB
twngi
if less than RA,RB
twlti
if less than or equal RA,RB
twlei
if not less than RA,RB
twnli
if logically greater than RA,RB
twlgti
if logically greater than or equal RA,RB
twlgei
if logically not greater than RA,RB
twlngi
if logically less than RA,RB
twllti
if logically less than or equal RA,RB
twllei
if logically not less than RA,RB twlnli
V
Operation Name Operands OperatorVector Add Carry-out Unsigned Word (AltiVec specific) VT,VA,VB
vaddcuw
Vector Add Float (AltiVec specific) VT,VA,VB
vaddfp
PowerPC Assembler Instructions 115
Operation Name Operands
Operator
Vector Add Signed Byte Saturate (AltiVec specific) VT,VA,VB
vaddsbs
Vector Add Signed Halfword Saturate (AltiVec specific) VT,VA,VB
vaddshs
Vector Add Signed Word Saturate (AltiVec specific) VT,VA,VB
vaddsws
Vector Add Unsigned Byte Modulo (AltiVec specific) VT,VA,VB
vaddubm
Vector Add Unsigned Byte Saturate (AltiVec specific) VT,VA,VB
vaddubs
Vector Add Unsigned Halfword Modulo (AltiVec specific) VT,VA,VB
vadduhm
Vector Add Unsigned Halfword Saturate (AltiVec specific) VT,VA,VB
vadduhs
Vector Add Unsigned Word Modulo (AltiVec specific) VT,VA,VB
vadduwm
Vector Add Unsigned Word Saturate (AltiVec specific) VT,VA,VB
vadduws
Vector Logical AND (AltiVec specific) VT,VA,VB
vand
Vector Logical AND with Complement (AltiVec specific) VT,VA,VB
vandc
Vector Multiply-Add Float (AltiVec specific) VT,VA,VC,VB
vmaddfp
Vector Average Signed Byte (AltiVec specific) VT,VA,VB
vavgsb
Vector Average Signed Halfword (AltiVec specific) VT,VA,VB
vavgsh
Vector Average Signed Word (AltiVec specific) VT,VA,VB
vavgsw
Vector Average Unsigned Byte (AltiVec specific) VT,VA,VB
vavgub
Vector Average Unsigned Halfword (AltiVec specific) VT,VA,VB
vavguh
Vector Average Unsigned Word (AltiVec specific) VT,VA,VB
vavguw
Vector Convert From Signed fiXed-point word (AltiVec specific) VT,VB,UIM
vcfsx
116 PowerPC Assembler Instructions
Operation Name Operands
Operator
Vector Convert From Unsigned fiXed-point word (AltiVec specific) VT,VB,UIM
vcfux
Vector Compare Bounds Float [Record] (AltiVec specific) VT,VA,VB
vcmpbfp
VT,VA,VB vcmpbfp.
Vector Compare Equal-To Float [Record] (AltiVec specific) VT,VA,VB
vcmpeqfp
VT,VA,VB vcmpeqfp.
Vector Compare Equal-To Unsigned Byte [Record] (AltiVec specific) VT,VA,VB
vcmpequb
VT,VA,VB vcmpequb.
Vector Compare Equal-To Unsigned Halfword [Record] (AltiVec specific) VT,VA,VB
vcmpequh
VT,VA,VB vcmpequh.
Vector Compare Equal-To Unsigned Word [Record] (AltiVec specific) VT,VA,VB
vcmpequw
VT,VA,VB vcmpequw.
Vector Compare Greater-Than-or-Equal-To Float [Record] (AltiVec specific) VT,VA,VB
vcmpgefp
VT,VA,VB vcmpgefp.
Vector Compare Greater-Than Float [Record] (AltiVec specific) VT,VA,VB
vcmpgtfp
VT,VA,VB vcmpgtfp.
Vector Compare Greater-Than Signed Byte [Record] (AltiVec specific) VT,VA,VB
vcmpgtsb
VT,VA,VB vcmpgtsb.
Vector Compare Greater-Than Signed Halfword [Record] (AltiVec specific) VT,VA,VB
vcmpgtsh
VT,VA,VB vcmpgtsh.
Vector Compare Greater-Than Signed Word [Record] (AltiVec specific) VT,VA,VB
vcmpgtsw
VT,VA,VB vcmpgtsw.
Vector Compare Greater-Than Unsigned Byte [Record] (AltiVec specific) VT,VA,VB
vcmpgtub
PowerPC Assembler Instructions 117
Operation Name Operands
Operator
VT,VA,VB vcmpgtub.
Vector Compare Greater-Than Unsigned Halfword [Record] (AltiVec specific) VT,VA,VB
vcmpgtuh
VT,VA,VB vcmpgtuh.
Vector Compare Greater-Than Unsigned Word [Record] (AltiVec specific) VT,VA,VB
vcmpgtuw
VT,VA,VB vcmpgtuw.
Vector Convert To Signed fiXed-point word Saturate (AltiVec specific) VT,VB,UIM
vctsxs
Vector Convert To Unsigned fiXed-point word Saturate (AltiVec specific) VT,VB,UIM
vctuxs
Vector 2 Raised to the Exponent Estimate Float (AltiVec specific) VT,VB
vexptefp
Vector Log 2 Estimate Float (AltiVec specific) VT,VB
vlogefp
Vector Maximum Float (AltiVec specific) VT,VA,VB
vmaxfp
Vector Maximum Signed Byte (AltiVec specific) VT,VA,VB
vmaxsb
Vector Maximum Signed Halfword (AltiVec specific) VT,VA,VB
vmaxsh
Vector Maximum Signed Word (AltiVec specific) VT,VA,VB
vmaxsw
Vector Maximum Unsigned Byte (AltiVec specific) VT,VA,VB
vmaxub
Vector Maximum Unsigned Halfword (AltiVec specific) VT,VA,VB
vmaxuh
Vector Maximum Unsigned Word (AltiVec specific) VT,VA,VB
vmaxuw
Vector Multiply-High and Add Signed Halfword Saturate (AltiVec specific) VT,VA,VB,VC
vmhaddshs
Vector Multiply-High Round and Add Signed Halfword Saturate (AltiVec specific)
VT,VA,VB,VC vmhraddshs
Vector Minimum Float (AltiVec specific) VT,VA,VB
vminfp
118 PowerPC Assembler Instructions
Operation Name Operands
Operator
Vector Minimum Signed Byte (AltiVec specific) VT,VA,VB
vminsb
Vector Minimum Signed Halfword (AltiVec specific) VT,VA,VB
vminsh
Vector Minimum Signed Word (AltiVec specific) VT,VA,VB
vminsw
Vector Minimum Unsigned Byte (AltiVec specific) VT,VA,VB
vminub
Vector Minimum Unsigned Halfword (AltiVec specific) VT,VA,VB
vminuh
Vector Minimum Unsigned Word (AltiVec specific) VT,VA,VB
vminuw
Vector Multiply-Low and Add Unsigned Halfword Modulo (AltiVec specific) VT,VA,VB,VC
vmladduhm
Vector Move Register (AltiVec specific) VT,VS
vmr
Vector Merge High Byte (AltiVec specific) VT,VA,VB
vmrghb
Vector Merge High Halfword (AltiVec specific) VT,VA,VB
vmrghh
Vector Merge High Word (AltiVec specific) VT,VA,VB
vmrghw
Vector Merge Low Byte (AltiVec specific) VT,VA,VB
vmrglb
Vector Merge Low Halfword (AltiVec specific) VT,VA,VB
vmrglh
Vector Merge Low Word (AltiVec specific) VT,VA,VB
vmrglw
Vector Reciprocal Square Root Estimate Float (AltiVec specific) VT,VB
vrsqrtefp
Vector Multiply-Sum Mixed-sign Byte Modulo (AltiVec specific) VT,VA,VB,VC
vmsummbm
Vector Multiply-Sum Signed Halfword Modulo (AltiVec specific) VT,VA,VB,VC
vmsumshm
Vector Multiply-Sum Signed Halfword Saturate (AltiVec specific) VT,VA,VB,VC
vmsumshs
Vector Multiply-Sum Unsigned Byte Modulo (AltiVec specific) VT,VA,VB,VC
vmsumubm
PowerPC Assembler Instructions 119
Operation Name Operands
Operator
Vector Multiply-Sum Unsigned Halfword Modulo (AltiVec specific) VT,VA,VB,VC
vmsumuhm
Vector Multiply-Sum Unsigned Halfword Saturate (AltiVec specific) VT,VA,VB,VC
vmsumuhs
Vector Multiply Even Signed Byte (AltiVec specific) VT,VA,VB
vmulesb
Vector Multiply Even Unsigned Byte (AltiVec specific) VT,VA,VB
vmuleub
Vector Multiply Even Signed Halfword (AltiVec specific) VT,VA,VB
vmulesh
Vector Multiply Even Unsigned Halfword (AltiVec specific) VT,VA,VB
vmuleuh
Vector Multiply Odd Signed Byte (AltiVec specific) VT,VA,VB
vmulosb
Vector Multiply Odd Unsigned Byte (AltiVec specific) VT,VA,VB
vmuloub
Vector Multiply Odd Signed Halfword (AltiVec specific) VT,VA,VB
vmulosh
Vector Multiply Odd Unsigned Halfword (AltiVec specific) VT,VA,VB
vmulouh
Vector Negative Multiply-Subtract Float (AltiVec specific) VT,VA,VC,VB
vnmsubfp
Vector Logical NOR (AltiVec specific) VT,VA,VB
vnor
Vector Logical Complement (AltiVec specific) VT,VS
vnot
Vector Logical OR (AltiVec specific) VT,VA,VB
vor
Vector Permute (AltiVec specific) VT,VA,VB,VC
vperm
Vector Pack Pixel32 (AltiVec specific) VT,VA,VB
vpkpx
Vector Pack Signed Halfword Signed Saturate (AltiVec specific) VT,VA,VB
vpkshss
Vector Pack Signed Halfword Unsigned Saturate (AltiVec specific) VT,VA,VB
vpkshus
Vector Pack Signed Word Signed Saturate (AltiVec specific) VT,VA,VB
vpkswss
120 PowerPC Assembler Instructions
Operation Name Operands
Operator
Vector Pack Signed Word Unsigned Saturate (AltiVec specific) VT,VA,VB
vpkswus
Vector Pack Unsigned Halfword Unsigned Modulo (AltiVec specific) VT,VA,VB
vpkuhum
Vector Pack Unsigned Halfword Unsigned Saturate (AltiVec specific) VT,VA,VB
vpkuhus
Vector Pack Unsigned Word Unsigned Modulo (AltiVec specific) VT,VA,VB
vpkuwum
Vector Pack Unsigned Word Unsigned Saturate (AltiVec specific) VT,VA,VB
vpkuwus
Vector Reciprocal Estimate Float (AltiVec specific) VT,VB
vrefp
Vector Round to Floating-Point Integer toward Minus infinity (AltiVec specific) VT,VB
vrfim
Vector Round to Floating-Point Integer Nearest (AltiVec specific) VT,VB
vrfin
Vector Round to Floating-Point Integer toward Positive infinity (AltiVec specific) VT,VB
vrfip
Vector Round to Floating-Point Integer toward Zero (AltiVec specific) VT,VB
vrfiz
Vector Rotate Left Integer Byte (AltiVec specific) VT,VA,VB
vrlb
Vector Rotate Left Integer Halfword (AltiVec specific) VT,VA,VB
vrlh
Vector Rotate Left Integer Word (AltiVec specific) VT,VA,VB
vrlw
Vector Conditional Select (AltiVec specific) VT,VA,VB,VC
vsel
Vector Shift Left (AltiVec specific) VT,VA,VB
vsl
Vector Shift Left Integer Byte (AltiVec specific) VT,VA,VB
vslb
Vector Shift Left Double by Octet Immediate (AltiVec specific) VT,VA,VB,SH
vsldoi
Vector Shift Left Integer Halfword (AltiVec specific) VT,VA,VB
vslh
Vector Shift Left by Octet (AltiVec specific) VT,VA,VB
vslo
PowerPC Assembler Instructions 121
Operation Name Operands
Operator
Vector Shift Left Integer Word (AltiVec specific) VT,VA,VB
vslw
Vector Splat Byte (AltiVec specific) VT,VB,UIM
vspltb
Vector Splat Halfword (AltiVec specific) VT,VB,UIM
vsplth
Vector Splat Immediate Signed Byte (AltiVec specific) VT,SIM
vspltisb
Vector Splat Immediate Signed Halfword (AltiVec specific) VT,SIM
vspltish
Vector Splat Immediate Signed Word (AltiVec specific) VT,SIM
vspltisw
Vector Splat Word (AltiVec specific) VT,VB,UIM
vspltw
Vector Shift Right (AltiVec specific) VT,VA,VB
vsr
Vector Shift Right Algebraic Byte (AltiVec specific) VT,VA,VB
vsrab
Vector Shift Right Algebraic Halfword (AltiVec specific) VT,VA,VB
vsrah
Vector Shift Right Algebraic Word (AltiVec specific) VT,VA,VB
vsraw
Vector Shift Right Byte (AltiVec specific) VT,VA,VB
vsrb
Vector Shift Right Halfword (AltiVec specific) VT,VA,VB
vsrh
Vector Shift Right by Octet (AltiVec specific) VT,VA,VB
vsro
Vector Shift Right Word (AltiVec specific) VT,VA,VB
vsrw
Vector Subtract & write Carry-out Unsigned Word (AltiVec specific) VT,VA,VB
vsubcuw
Vector Subtract Float (AltiVec specific) VT,VA,VB
vsubfp
Vector Subtract Signed Byte Saturate (AltiVec specific) VT,VA,VB
vsubsbs
Vector Subtract Signed Halfword Saturate (AltiVec specific) VT,VA,VB
vsubshs
122 PowerPC Assembler Instructions
Operation Name Operands
Operator
Vector Subtract Signed Word Saturate (AltiVec specific) VT,VA,VB
vsubsws
Vector Subtract Unsigned Byte Modulo (AltiVec specific) VT,VA,VB
vsububm
Vector Subtract Unsigned Byte Saturate (AltiVec specific) VT,VA,VB
vsububs
Vector Subtract Unsigned Halfword Modulo (AltiVec specific) VT,VA,VB
vsubuhm
Vector Subtract Unsigned Halfword Saturate (AltiVec specific) VT,VA,VB
vsubuhs
Vector Subtract Unsigned Word Modulo (AltiVec specific) VT,VA,VB
vsubuwm
Vector Subtract Unsigned Word Saturate (AltiVec specific) VT,VA,VB
vsubuws
Vector Sum Across Signed Word Saturate (AltiVec specific) VT,VA,VB
vsumsws
Vector Sum Across Partial (1/2) Signed Word Saturate (AltiVec specific) VT,VA,VB
vsum2sws
Vector Sum Across Partial (1/4) Signed Byte Saturate (AltiVec specific) VT,VA,VB
vsum4sbs
Vector Sum Across Partial (1/4) Signed Halfword Saturate (AltiVec specific) VT,VA,VB
vsum4shs
Vector Sum Across Partial (1/4) Unsigned Byte Saturate (AltiVec specific) VT,VA,VB
vsum4ubs
Vector Unpack High Pixel16 (AltiVec specific) VT,VB
vupkhpx
Vector Unpack High Signed Byte (AltiVec specific) VT,VB
vupkhsb
Vector Unpack High Signed Halfword (AltiVec specific) VT,VB
vupkhsh
Vector Unpack Low Signed Byte (AltiVec specific) VT,VB
vupklsb
Vector Unpack Low Pixel16 (AltiVec specific) VT,VB
vupklpx
Vector Unpack Low Signed Halfword (AltiVec specific) VT,VB
vupklsh
Vector Logical XOR (AltiVec specific) VT,VA,VB
vxor
PowerPC Assembler Instructions 123