The thesis addresses the problem of evaluating the reliability of combinational circuits in terms of changes in performance and energy. Performance and energy consumption are calculated according to the value ofVdd applied to the circuit. This work considers transient faults caused by neutron particles which may affect digital circuits during its normal operation. The research work in this thesis focuses on studying the generation and propagation of transient pulses at various voltages. This enables us to evaluate precisely the reliability metric and to study the effect of circuit parameters on tran- sient pulse propagation. This research is conducted at the circuit level of abstraction.
The major contributions of this thesis can be summarised as follows:
• Reliability, energy consumption and performance metrics are combined in one trade-off interplay. This relationship allows us to explore the change in reliability due to changing one or both the other metrics of performance and energy consumption. So, performance and/or energy consumption can be tuned depending on their criticality for the application so as to
1.2 thesis scope and contributions 7
control the reliability. This is accomplished by a new proposed method for the evaluation of reliability at low levels of implementation in the bottom-up design flow. This design flow can be seen in Fig. 1.3, which shows two main aspects of system design architecture which are the implementation and verification paths. So, using this approach, we are able to address reliability issues at the stage of designing a circuit as a group of logic gates and flip-flops. If issues with circuit reliability are detected, it is possible to rectify them in the early stages of implementation.
Specification Architectured Patitioning Testbench dddddddddddddSensor/ Actuater Software Maskdset Layout Circuit Netlist Behavioral description Software dddddddddddddSensor/ Actuater analog digital Synthesis available partiallydavailable missing FormaldVerification Mixed-Signaldsimulationd
Figure 1.3: The V-Cycle of System Design Architecture [43].
The core idea of the proposed method is based on splitting the reliability evaluation process into two levels of characterisations: a platform-level stochastic interference model and a circuit-level model:
– The platform-level interference model is fixed and applicable to any design
or system under test. For example, it may include a probability density function (PDF) of neutron energy and a model of the current pulse in the transistor as a function of the neutron energy, transistor size and type, source-drain voltage, temperature, etc. Its purpose is to characterise the interference, possibly expressed in non-electrical terms (for example particle energy distribution), as electrical effects, (for example pulses of current having their magnitude, duration and arrival time described stochastically). This is done just once at design time and not specific to a particular design but is universal for every component in the circuit.
– The circuit-level model is the core idea of the proposed method. This
model converts the stochastic description of the electrical interference (the current pulse caused by neutron strike) into the probability of error at the circuit output. This is achieved by finding the critical values for the interference parameter beyond which it causes an error; for example an incorrect output value written into a flip-flop. The critical values are found by a series of analogue simulation runs on the circuit. Then, given knowledge of the critical values of the interference parameter, it becomes possible to analytically recalculate the stochastic model of the interference into the probability of an output error or correct operation (reliability).
• In this work, neutron particle strikes are chosen to be the cause of the faults in a digital circuit. So, in order to apply the proposed method for the estimation of the reliability of combinational circuits, we need to model the transient current pulse that is generated because of the particle strike. This model needs to be chosen carefully, as it has a significant impact on the accuracy of the estimated reliability. A model introduced in [80] is used. In this model, the effect of a neutron strike is represented as a dependent current source added to a BSIM4 Spice model of a MOSFET transistor. Moreover, the energy of the particles is expressed as a metric ofLET, because it is the effect of their interaction with the transistor that matters here and not their kinetic energy. This model is attached using the Cadence tool in circuit-level simulation to inject an single event transient (SET) into the faulty node.
• The effect of logical masking and electrical masking on the generatedSETis taken into account by using analogue simulation to find the critical values of theSETs at the output of the circuit under test (CUT). In some soft error rate (SER) techniques, such as FASER [137], a predefined trapezoidal shape has been used to represent the generated transient pulse rather than using a fault model to generate it. Models are also used to implicitly include the effect of logical masking and electrical masking, which caused ignoring the effect of propagation-induced pulse broadening (PIPB). Using these models accelerates the estimation process, but also decreases the precision of the obtained results.
• A technique to improve the reliability of combinational circuits is proposed. In this technique, a filter stage is added at the primary outputs of the