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Triggered Features Identifiable with Indeterminate Delay

Embedded Systems

4.2 Signal Generation and Evaluation

4.2.4 Triggered Features Identifiable with Indeterminate Delay

Triggered features identifiable with indeterminate delay (TID) are available only with an inde- terminate delay. As a consequence, they are distributed over a previously unknown number of simulation iterations. In other words, a single feature extraction algorithm can require different amounts of time depending on the SUT behavior. Thereby, the generation of TID feature re- quires information about the triggers needed for the extraction and the delay of the feature. This behavior contrasts with TI and TDD features presented so far. TDD features are not always available, but they are identifiable with a determinate delay or even without a delay. However, this fact implies that they are computable at every time step. The algorithm runs cyclically and extracts a feature in predefined time frames.

TID features are extracted sequentially, under the assumption that the same features do not overlap in the signal. The extraction implementation of TID features is based on the extraction of three signals: characteristic feature value (feature signal) – as already discussed for TI fea- tures, time when the feature value is available (trigger signal) – as added for TDD features, and

the observation point, establishing the time range when the feature is valid (reset signal).

The feature signal represents the values of the extracted feature in time; however, its value is

considered only when the trigger signal is active. The reset signal monitors the feature extrac-

tion process and becomes active for one single time step when the feature extraction is com- pleted. It indicates the delay of TID features and can have a value of true or false – the same as the trigger signal.

The reset signal can be obtained in a similar manner to the trigger and feature signals. How- ever, it is allowed to become active not later than the trigger. Hence, either both signals become active at the same time or the reset signal is followed by the activation of the trigger signal.

Otherwise, the trigger activation is ignored.

The examples of detection and generation mechanisms for triggered features identifiable with indeterminate delay are outlined in Table 4.3.

Table 4.3: TID Features – Evaluation and Generation Algorithms.

Evaluation View Generation View

SigF Triggered (TID) Id enti fiable w ith und etermi ned delay

5-1. Detection of time between two events

5-2. Detection of signal mean value in the interval be- tween two events

5-3. Detection of response delay [MSF05]

5-4. Complete step detection

[MSF05, LLK+06]

5-5. Detection of step response characteristics [LLK+06], e.g., – steady-state error – rise time – overshoot – settling time

5-1. Any non-constant curve where two concrete events appear one after an- other in the permitted range of values within the given time range Generation information:

– time of event1 (t1)

– time of event2 (t2) not exceeding the permitted duration, where t1<t2

5-2. Any non-constant curve intersected by two concrete events sequenced one after another in the permitted range of values within the given time range Generation information:

– signal mean value

5-3. A stabilized constant followed by a step response characteristics with given response delay in the permitted range of values within the given time range

Generation information:

– response delay

5-4. At least two steps one after another starting at a default/given value with a default/given step size and a default/given time between them and in the permitted range of values within the given time range

Generation information:

– step size

– time between steps

Parameters:

– constant duration before a step

– minimal step size

5-5. A stabilized constant followed by a step response characteristics in the permitted range of values and time

Generation information: – steady-state error – rise time – overshoot – settling time Parameters:

– constant duration before a step – minimal step size

– systems static gain

– rise time interval lower limit (in set point %) – rise time interval upper limit (in set point %)

– maximum overshoot - moving average weight

– settling time range (in set point %) – steady-state error - moving average weight

min max t2 duration x2 t1 x1 signal (kT)

Figure 4.22: Feature Generation: Time between Two Events.

Time between two events is one of the simplest TID features. From the generation viewpoint,

almost any non-constant curve in the permitted range of values and duration time fulfills the generation requirements as illustrated in Figure 4.22. The feature is obtained by projecting the times of events t1 and t2 onto the generated signal. These determine the values of the signal and

are treated as events in this particular case. From the evaluation viewpoint, it is arbitrary when the TID feature appears – thus also when the events appear – but they must follow each other in a sequence, so as to catch the time between them.

min max t2 duration mean value + x t1 signal (kT) mean value mean value – x

Figure 4.23: Feature Generation: Signal Mean Value in the Interval between Two Events.

Signal mean value in the interval between two events is based on the previous feature. Its gen-

eration algorithm is presented in Figure 4.23. Here again, almost any non-constant curve in the permitted range of values and duration time fulfills the generation requirements. However, the feature is obtained by projecting the mean value between two automatically determined values

mean value+x and mean value–x onto the generated signal. By that, their occurrence times are

also automatically determined. These points are treated as events in this particular case. An- other possible generation algorithm would be to provide the events explicitly and manually on

the curve by preserving the mean value of interest. Numerous other features alike and combina- tions of them are possible.

The response delay can be measured in a situation when an input step is applied on a stabilized system. The time needed for a system to respond is the delay. In the evaluation system the reset signal becomes active at the time of step occurrence – it being the decisive factor for any rela-

tions with other features.

A generation algorithm for a complete step will be described in Section 5.5 as it exploits the

concept of test reactiveness. It can be extracted by analyzing a step and the signal right before the step, which must be constant. The situation becomes even more complex when a steady state of a system is considered. In that case, both SUT input and output signals should be con- stant for a minimum time, before the step eventually appears.

The detection of a complete step can be used to analyze the system step response, since it in- cludes all preconditions necessary for the correct measurement of the step response characteris- tics. The step response is widely used for the description of the behavior of control systems. A common step response of a second-order linear system28is drawn in Figure 4.24. Here four characteristics of the step response are marked. The upper plot shows the corresponding step signal causing the step response below.

In the following paragraphs, the step response characteristics will be defined, before some in- depth insight is given into the implementation of the actual feature generation and extraction. Hence, the rise time (tr) is defined as the time the system response needs to get from 10% to

90% of the set point yss after the step. Thus, a short rise time will mean a rapid system response

to the new input situation. Shorter rise times are commonly associated with a larger maximum overshoot, i.e., the step response shoots over the actual target. For the maximum overshoot

many different definitions are used. A widespread one defines it as a percentage of the set point as: ss ss p y y M(4.4)

where Mp is the step response value at the maximum peak.

A further step response parameter is the settling time. It indicates how long it takes to leave the

transient state and thus reach the steady state. In practical terms, this is the time between the input step and the last time point when the signal crosses into a user-defined tolerance range around the set point. Finally, the steady-state error provides information about the final devia- tion of the signal from the expected reference value (r) in the steady state. Before this deviation

can be measured it must be assured that the steady state has been reached. Further step response characteristics such as the delay time or the peak time will not be considered in this work.

kT ess= yss- r tr r Maximum overshoot 0.9·yss 0.1·yss ts yss-d yss+d yss b) y (kT) kT a) u (kT)

Figure 4.24: Reaction on a Step Function: a) A Step Function – u(kT). b) Step Response Characteristics y(kT): rise time (tr), maximum overshoot,

settling time (ts) and steady-state error (ess).

Generation of a step response is of lower practical importance than its evaluation as usually the controller outputs are to be checked and not produced. However, a proposal for a simple gen- eration will be introduced for reasons of completeness. It is realized as a MATLAB (ML) script. It is based on adjusting the damping ratio and natural frequency29 assuming that one unit step is applied at the input.

The simplest second-order system satisfies a differential equation of this form [Kuo03, EMC+99]:

)

(

2

2 2 2 2

t

u

G

y

dt

dy

dt

y

d

n DC n n

ω

ω

ζω

+

=

+

(4.5) where:

− y(t) – response of the system − u(t) – input to the system − ζ – damping ratio

− GDC – DC (direct current) gain of the system − ωn – undamped natural frequency

29 A normalized step response computed as a result of adjustment of the considered parameters can be animated by accessing

the dedicated web page of University of Hagen: http://www.fernuni-hagen.de/LGES/playground/miscApplets/ Sprungant- wort.html [04/30/2008].

The parameters determine different aspects of various kinds of responses. Whenever an impulse response, step response, or response to other inputs is concerned, the following relations apply [Kuo03, EMC+99]:

− ωn will determine how fast the system oscillates during any transient response

− ζ will determine how much the system oscillates as the response decays towards steady state

− Gdc will determine the size of steady-state response when the input settles out to a con- stant value.

Deriving the response ys(t) to a step of unit amplitude, the forced differential equation is:

)

(

2

2 2 2

t

u

y

dt

dy

dt

y

d

s s n s n s

+

ζω

+ω

=

(4.6)

where us(t) is the unit step function.

To illustrate, the solution obtained for the equation (4.6), where ζ = 1, is:

[1

]

1.

1

)

(

=

2

ω

ζ

=

ω

ω ω

te

for

e

t

y

t n t n s n n (4.7)

The second-order system step response is a function of both the system damping ratioζ and the undamped natural frequency ωn. For damping ratios less than one, the solutions are oscillatory and overshoot the steady-state response. In the limiting case of zero damping the solution oscil- lates continuously about the steady-state solution yss with a maximum value of ymax = 2yss and a

minimum value of ymin = 0, at a frequency equal to the undamped natural frequency ωn. As the

damping is increased, the amplitude of the overshoot in the response decreases, until at critical damping ζ = 1, the response reaches steady-state with no overshoot. For damping ratios greater than unity, the response exhibits no overshoot, and as the damping ratio is further increased the response approaches the steady-state value more slowly.

Manipulating the damping ratio and natural frequency enables different graphs with various characteristics to be obtained. The possible step responses of stable second-order systems are plotted in Figure 4.25 in terms of non-dimensional time ωnt and normalized amplitude y(t)=yss.

Figure 4.25: Step Response of Stable Second-Order System for Different Damping Ratios. Then, the realization of an online extraction algorithm for the step response characteristics in SL is a more complex task due to their dependency on the input signal. It has been originally proposed by [MP07]. Starting with the extraction of the newly introduced reset signal the im-

plementation is presented in Figure 4.26. The reset signal is common to all four considered fea-

tures and it becomes active whenever a step appears under the condition that SUT input and output have been constant for some time. The memory block in Figure 4.26 is necessary to de- lay the result of this extraction by one unit.

Figure 4.26: Reset Signal Extraction for Step Response Evaluation.

The diagram checking if both signals are constant for some user-specified time is shown in Figure 4.27. The TDD feature extraction block time since signal constant has been utilized twice; the minimum of both TDD features delivers the time since both signals were constant. If

the triggers are true, the time value is extracted and compared with the minimum constant time. The latter is specified for the reset signal extraction.

Figure 4.27: Constancy Check for a Given Minimal Time within the Reset Signal Extraction. Figure 4.28 contains the diagram of the step detection algorithm, including a further parameter – the minimal step size – which must also be set while generating the step and the step response.

Figure 4.28: Step Detection within the Reset Signal Extraction.

An additional parameter – the relative tolerance value – is hidden behind the constant detection algorithm. It must be provided for both generation and extraction of step and step response. The parameters can be set up in the mask GUIs of the corresponding blocks.

The feature signal extraction for the four considered SigFs is more complex. They are checked in parallel so as to take advantage of synergies during their extraction.

Figure 4.29: Feature Signals Extraction for Step Response Evaluation.

Figure 4.29 shows the insights of feature signals extraction of the step response characteristics.

For each of them a separated block is provided. Additionally, the time of step occurrence (step time) is computed using a triggered subsystem that is activated by the reset signal and thus holds the step time.

The feature extraction algorithms of the rise and settling time need to know the set point yss in

advance. Instead of yss the reference value r is used, because the yss is not available in advance.

In the implementation, the reference r is designed as set point yss for simplification. The re-

sponse step size – the difference between the set points after and before the step – and the step

sign are calculated by the block called Expected set point and step parameters, the insights into

which are shown in Figure 4.30. The expected set point is computed using a parameter – the static gain of the system.

Figure 4.30: Computing Response Step Size, Step Size and Expected Set Point.

Figure 4.31 shows the implementation of the rise time extraction algorithm. When the step re-

sponse crosses the 10% of r and then 90% of r, it triggers the subsystem which calculates the

time difference between two last times it was activated. The activation is an effect of the signal from XOR block or the reset signal.

Figure 4.31: Feature Extraction: Rise Time.

If the reset signal does not become active during the rise time (i.e., no new step appears), the

algorithm measures the rise time and holds it at the output. The assumption is, however, that the signal will not go back to the value of 90% of r, which can happen in reality. Hence, the im- plementation of the Time difference block is refined and shown in Figure 4.32. The two mem-

ory blocks on the right store the last two activation times, whereas the Execution counter block

counts the execution times of the triggered subsystem. These are limited to 3 so as to catch the rise time limits properly. The counter is reset by the reset signal every time when a new step appears.

Figure 4.32: Time Difference Block for Rise Time Detection.

The settling time extraction algorithm is presented in Figure 4.33. Here, the time difference be-

tween the time point when the signal stabilizes and the time of step occurrence is computed. Every time the step response enters the tolerance range around the expected set point, a time stamp is made. If the tolerance range is not left any more, the settling time has been caught. This is the last time difference held before the trigger becomes active. Furthermore, the reset

signal resets the triggered subsystem, called Time stamp at the beginning of every step, deleting

any old information stored inside.

Figure 4.33: Feature Extraction: Settling Time.

The steady-state error is computed at every time step. The expected set point is subtracted from

the actual signal value and the difference is filtered using a moving average block as shown in Figure 4.34.

The extraction of the maximum overshoot is more complicated and the implementation details

are left out of the scope in this description. They can be found in the work of [MP07].

Finally, also the trigger signal must be computed so as to let the evaluation mechanism work

properly. The trigger for the steady-state error is activated when the step response has stabi-

lized and the SUT input signal has not changed its value after the step. These constraints also guard the termination of the extraction algorithms for the other three features. For checking them, the algorithm presented previously in Figure 4.27 is used in combination with the TI fea- ture detect increase for detecting the rising step. With this practice, the trigger signal becomes

active for only one time step. Additionally, the steady-state error should remain within a cer-

tain range so as to guarantee that the proper stabilization has been reached. The trigger algo- rithm is shown in Figure 4.35.

Figure 4.35: Extraction of Trigger Signals.

To sum up, generation of the TID features is relatively similar for TI and TDD features since only more parameters appear, making the implementation not exceptionally difficult. Their evaluation, however, needs three types of signals for the proper extraction: feature, trigger and

reset. Such an approach reduces the complexity, which otherwise becomes large.