Switch to goal initial_rtl/lint/synthesis under „Run Goal‟ list of already run goals in Analyze Results tab. You will see 3 violations for rule InferLatch under Goal=initial_rtl/lint/synthesis
This rule flags all signals where a latch will be inferred during synthesis of the design. So this rule helps in the detection of RTL code, which can result in the generation of unintended latch structures.
Expand the rule folder and look at the first violation message, which is reporting that a latch is inferred for signal "hready". Using RTL cross-probing, you can see that signal ‘hready’ is getting assigned inside an if statement without an else part and that seems to be the valid reason for latch inference during synthesis.
Getting Started with SpyGlass - Lab Book SpyGlass 4.5.0
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If design requires hready signal to be latched w.r.t strobe signal ‘stb_o’, then this is not an unintended structure. For the purposes of this lab we will assume that these latches are intentional. So typically, user would not like to see violation messages for intended latch structures again and again. In SpyGlass you mask the unwanted rule messages by masking them by defining waiver constraints as we have
demonstrated in lab1 (RH click on violation message and selecting „Waive Selected Messages..‟).
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Review the violation message, rule and design unit (DU) details on which the waiver is to be applied in the lower half of the Waiver window. This makes sure that waiver is applied on correct or desired set of objects. If they are ok, then click on “Apply” button to apply the same on design under analysis.
If you want to re-use the currently generated waivers in future spyglass runs, then you need to also save the waiver constraints in a waiver file (.swl). This can be done by selecting option “Save File As.” on right click menu generated on “New Waiver File pointer under Waiver Files folder”
towards the left hand side of the waiver window. Refer to snapshot below for exact look and feel.
Getting Started with SpyGlass - Lab Book SpyGlass 4.5.0
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Repeat the same steps to waive the following violations in this as well as other goals like simulation,structure and synthesis
Remaining InferLatch violations
Violations of rule NoAssignX-ML
Violations of rule STARC-2.10.6.1
Once the waivers are completed, save the file as “wb_subsystem_files/wb_subsystem.swl”.
Now when you save the project file, SpyGlass will add this waiver file as an input file to the tool.
read_file –type waiver wb_subsystem_files/wb_subsystem.swl
at the same time as you just have single waiver file, so, this one becomes the default waiver file and is dumped in the project file with following option:
set_option default_waiver_file wb_subsystem_files/wb_subsystem.swl
With all the changes done so far, save the project again and exit from UI.
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We have additionally observed that for each goal there is an additional built-in warning reported by rule „HdlLibDuCheck_01‟ which indicates that there are precompiled design units used but rule checking has not been enabled for them. To get that enabled, you add the following in wb_subsystem.prj file:
set_option hdllibdu yes
And now rerun the goals in batch mode as follows:
%spyglass –project wb_subsystem.prj –batch -goal
„initial_rtl/lint/synthesis,initial_rtl/lint/structure ,initial_rtl/lint/simulation,initial_rtl/lint/connectivity‟
Or using wildcard as these goals are under same task „lint‟ as follows:
% spyglass -project wb_subsystem.prj -batch -goal 'initial_rtl/lint/*'
This will result in a clean block which is ready for hand-off.
8 Block Hand-off
In this lab we will prepare the block we analyzed for hand-off to the SoC team for integration.
8.1 Block Hand-off
To enable the block hand-off, the following SpyGlass data should be packaged
RTL
2. Go to „tools‟ directory to invoke the script
% cd ../tools
%source package_block.csh
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3. Now go to the wb_subsystem_package/spyglass directory.
%cd ../spyglass/wb_subsystem_package/spyglass
4. We need to generate the SpyGlass datasheet and SpyGlass dashboard reports for the block (wb_subsystem) as part of handoff too. These will be done by calling a script as follows:
% ../tools/run_regression.csh wb_subsystem
Review the datasheet and the dashboard reports. These provide summary of the results that you see in the design which is being handed off. These reports can be extended for advanced products/goals which we have not run as part of this lab and so they are coming as empty but the idea here is to let you introduced to the reports and how to generate the report. You can also use the dashboard report to watch the progress of the block during RTL development. You would be required to ensure that Design objectives are passed but they relates to specific products like CDC, Constraints, DFT and Power and we have not covered them as part of this training/lab and hence ignoring that part of the report during handoff.
You can view the reports in browser as follows:
%mozilla <path to your $CWD>/wb_subsystem/dashboard.html
%mozilla <path to your $CWD>/wb_subsystem/datasheet.html
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Once this is complete, you may like to copy the datasheet and dashboard reports too- as part of the package directory and then make it ready to be shipped to the SoC integrator as follows:
% cp –r wb_subsystem/dashboard* welcome to use and modify these scripts to use them in your design flows. The scripts include
block_package.csh: Used to assemble the files needed to package an IP for shipment
run_regression.csh: Used to run multiple goals and aggregate the data