In-Class Interrupt/Timer Exercise
Using the Data sheet
Outline
•
Timing considerations
•
Real-time interrupt
Timing Considerations
1. Using the timing requirements as presented in class, what is the
maximum execution time that can be allowed for task B. Answer
with a least three significant digits. To receive credit for your
answer, You must show your work.
Task Execution time (ms) ci Frequency of execution (Hz) Ti A 6 25 B ? 5 C 5 40 D 2 50 40ms 200ms 25ms 20ms
Timing Considerations Solution for question1
Task Execution time (ms) ci Frequency of execution (Hz) Ti A 6 25 B ? 5 C 5 40 D 2 50
1. Use equation for “How to satisfy the frequency of execution”
(ci / Ti) n(2 (1/n) - 1) 2. Convert Hz to time domain
40ms 200ms 25ms 20ms 6/40ms = 0.15 B/200ms = B/200ms 5/25ms = 0.20 2/20ms = 0.1 (ci / Ti) n(2 (1/n) - 1) => (c i / Ti) 4(2 (1/4) - 1) 0.45 + (B/200ms) 0.75682846 (B/200ms) 0.75682846 - 0.45 B/200ms 0.30682846 B 0.30682846*200ms B 61.365692
Quick calculation: for each (ci / Ti)
0.75682846 – 0.45000000 = 0.306828 then ci/200ms = 0.306828 => ci = 0.306828* 200ms =61.365692
Answer = ___61.365692_________(milliseconds) Maximum allowed execution time B
3. for each (ci / Ti)
4. Sumation (ci / Ti) (ci / Ti) = 0.45+(B/200ms)
Interrupts
2. True-False. A function of type
interrupt
should only return an
integer. Circle the correct answer: a. True b. False
3. Write the C language macro (as discussed in lecture) to
enable global interrupts for a MC9S12 processor. Assume
the default CodeWarrior macro has been removed
Answer = ________________________
Note: interrupts do not return anything
#define ENABLE_INT asm cli Note: ENABLE_INT can be any user defined name, should be all upper case.
4. Write the C language code to enable global interrupts for a
MC9S12 processor. You may use the macro from the previous
question or use the assembly “in line” instruction
Outline
•
Timing considerations
•
Real-time interrupt
Real-time Interrupt
S12XE Clocks and Reset Generator (CRG) registers Data Sheet: Chapter 11 page 476
Real-time Interrupt
Real-time Interrupt
S12XE Clocks and Reset Generator (CRG) registers Chapter 11
Setting the interval for
the
RTI
•
time= [1/[16MHz/1)] * 214
Setting the interval for the RTI
•
Timeout Period OSCCLK frequency = 16 MHz
Real Time Interrupt Frequency Divide Rates for RTDEC = 0
(binary based divider values) data sheet pg480-481
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 Divide By: 2 time= 1/(16MHz/2) * setting Timeout Period OSCCLK
frequency = 16 MHz RTICTL: RTDEC RTR6 RTR5 RTR4 RTR3 RTR2 RTR1 RTR0
0x01: 0 0 0 0 0 0 0 1 OFF 6.25E-08 0.0625 uSec
0x11: 0 0 0 1 0 0 0 1 210 0.000128 0.128 mSec 0x21: 0 0 1 0 0 0 0 1 211 0.000256 0.256 mSec 0x31: 0 0 1 1 0 0 0 1 212 0.000512 0.512 mSec 0x41: 0 1 0 0 0 0 0 1 213 0.001024 1.024 mSec 0x51: 0 1 0 1 0 0 0 1 214 0.002048 2.048 mSec 0x61: 0 1 1 0 0 0 0 1 215 0.004096 4.096 mSec 0x71: 0 1 1 1 0 0 0 1 216 0.008192 8.192 mSec time= 1/(16MHz/2) * setting time= [1/(16MHz/1 ]* 214
Setting the interval for the RTI
• The real-time interrupt rate is dependent on the system crystal frequency and only a selected set of interrupt periods are available.
• For example:
• An interval setting of Two to the fourteenth power (2^14) is 16,384. • Therefore the timer sets the RTI every 16,384 counts.
• Since the OSCCLK is counting at a 16MHz rate (the rate for the class systems), • the flag will be set every 1.024 milliseconds (1/(16 x 106) x 16,384).
• If the RTI interrupt is enabled, an interrupt will be generated every 1.024 milliseconds. • If the output is divided by two ((1/(16 x 106/2)) x 16,384). , an interrupt will be generated
every 2.048 milliseconds.
• If one of the available intervals doesn’t work for an application, an output compare generated interrupt can be used that will provide interrupts at any interval. This table shows the periodic interrupt rate for OSCCLK frequencies. (data sheet page 480-481)
In-Class Exercise
Interrupts/Timer
EX AM PLE EX AM PLE EX AM PLE
Real Time Interrupt: register CRGINT and RTICTL settings
1. Write the following C language code for the Real Time Interrupt. a. 1. Enable the RTI interrupt. Assume 16MHz clock
2. Set the interrupt rate to approximately 1.024ms interrupts (use divide by 1)
3. Show the setting for an interrupt rate of approximately 4.096ms (use divide by 1)
4. Show the setting for an interrupt rate of approximately 8.192 ms (use divide by 2)
Use data sheet
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Real Time Interrupt: register CRGINT and RTICTL settings
Use data sheet
Using data sheet: binary based divider value, divide by one table page 480-481 Answer for 1.a.1:
CRGINT = 0x80; or CRGINT_RTIE = 1;
Answer for 1.a.2: binary based divider value, divide by one table page 480-481 2^14: [1/(16MHz/1)]* 2^14 = 1.024ms bit values: 0101000
RTICTL = 0x50;
Answer for 1.a.3: Using data sheet: binary based divider value, divide by one table page 480-481 2^16: [1/(16MHz / 1)]* 2^16 = 4.096ms bit values: 0111000
RTICTL = 0x70;
Answer for 1.a.4:
Using data sheet: binary based divider value, divide by two table page 480-481 Must move to next divide by to get the slower time interval.
2^16: [1/(16MHz / 2)]* 2^16 = 8.192ms bit values: 0111000
EX AM PLE EX AM PLE EX AM PLE
Real Time Interrupt: register CRGINT and RTICTL settings
Example solution for 1.a.2: Set the Real time Interrupt (RTI) interrupt rate to approximately 1.024ms interrupts: 1.024ms =(1/16MHz) *2x
• Isolate the unknown exponential: 1.024E-3/6.25E-8 = 2
x
=> 16384 =2x
• Take logarithms to base 10 of both sides: log(16384) =log( 2
x
) and use property 3 of logarithmsto bring down the exponent: log(16384) =log(2) * x
• Solve for x: log(19840) / log(2) = x => 14=x
Check using data sheet: binary based divider value, divide by one table page 480-481: 2^14 [1/(16MHz/1)]* 2^14 = 1.024ms datasheet: bit values: 01010000
EX AM PLE EX AM PLE EX AM PLE
Real Time Interrupt: register CRGINT and RTICTL settings
Example solution for 1.a.3: Set the Real time Interrupt (RTI) interrupt rate to approximately 4.096ms interrupts: 4.096ms =(1/16MHz) *2x
• Isolate the unknown exponential: 4.096E-3/6.25E-8 = 2
x
=> 65536 =2x
• Take logarithms to base 10 of both sides: log(65536) =log( 2
x
) and use property 3 of logarithmsto bring down the exponent: log(65536) =log(2) * x
• Solve for x: log(65536) / log(2) = x => 16=x
Check using data sheet: binary based divider value, divide by one table page 480-481: 2^16 [1/(16MHz/1)]* 2^16 = 4.096ms datasheet: bit values: 01110000
EX AM PLE EX AM PLE EX AM PLE
Real Time Interrupt: register CRGINT and RTICTL settings
Example solution for 1.a.4: Set the Real time Interrupt (RTI) interrupt rate to approximately 8.192ms interrupts: 8.192ms =[1/(16MHz/2)] *2x
• Isolate the unknown exponential: 8.192E-3/1.25E-7 = 2
x
=> 65536= 2x
• Take logarithms to base 10 of both sides: log(65536 ) =log( 2
x
) and use property 3 of logarithmsto bring down the exponent: log(65536 ) =log(2) * x
• Solve for x: log(65536 ) / log(2) = x => 16=x
Check using data sheet: binary based divider value, divide by two table page 480-481: 2^16 [1/(16MHz/2)]* 2^16 = 8.192ms datasheet: bit values: 01110001
Real-time Interrupt
S12XE Clocks and Reset Generator (CRG) registers Data Sheet: Chapter 11
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Real Time Interrupt: register CRGINT and RTICTL settings
1. b. Clear the RTI flag
Answer:
11.3.2.5 S12XECRG Interrupt Enable Register (CRGINT) page 476
This register enables S12XECRG interrupt requests Clear the RTI flag
CRGFLG |= 0x80; or CRGFLG_RTIF = 1;
2. What is the last statement (assembly level) in a function of type interrupt? Note: you did not have to write this statement in lab because CodeWarrior compiler adds it for us.
Answer: rti
Real-time Interrupt
S12XE Clocks and Reset Generator (CRG) registers
These are the
registers we will use to set-up a Real Time Interrupt on the MC9S12XEP100
Outline
•
Timing considerations
•
Real-time interrupt
EX AM PLE EX AM PLE EX AM PLE
Enhanced Capture Timer Output Compare settings
3. Write the following C code for an output compare to generate an interrupt at a set
interval on Port T bit 2 (Channel 2 of the Enhanced Captured Timer).
a. Initialize the timer and enable interrupts. 1. Enable global interrupts:
2. Assign timer Input/Output Select 3. Enable timer system control
4. Enable timer interrupt channel 5. Clear the capture flag
6. Set timer control to free running (no prescalar). Use data sheet
b. Load the compare register such that an interrupt will occur 2ms later. Let’s look at the MC9S12XEP100 data sheet: Chapter 14
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Enhanced Capture Timer Output Compare settings
3. Write the following C code for an output compare to generate an interrupt at a set
interval on Port T bit 2 (Channel 2 of the Enhanced Captured Timer).
asm cli; // enable global interrupts
ECT_TIOS_IO2 = 1; // channel (bit) 2 set as output or |= 0x40 ECT_TSCR1 |= 0x80; //set TEN bit to enable ECT timer system ECT_TIE_C2I = 1; //enable channel (bit) 2 interrupt or |=0x40 ECT_TFLG1 = 0xff; //set all bits to a 1 to clear all interrupt flags ECT_TSCR2 = 0x00; // this is the default or &= ~0x07 or &= 0xF8
a. Initialize the timer and enable interrupts. 1. Enable global interrupts:
2. Assign timer Input/Output Select 3. Enable timer system control 4. Enable timer interrupt channel 5. Clear the capture flag
6. Set timer control to free running (no prescalar) Use data sheet
b. Load the compare register such that an interrupt will occur 2ms later.
Solve for how long it takes 2 mSec to occur in our system and then add it to the counter bit: 1/8MHz = 0.125uSec =>
2E-3= n x 0.0125E-6 =>
2E-3/ 0.0125E-6 = n=>
n = 16,000
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Enhanced Capture Timer Input Capture settings
4. Write the following C code for an input capture on Port T bit 4 (Channel 4 of the Enhanced Captured Timer).
a. Setup the capture so that it captures a falling edge signal.
b. Clear the capture flag for the above problem:
c. Wait for the capture flag to indicate a successful capture Let’s look at the MC9S12XEP100 data sheet: Chapter 14
Enhanced Capture Timer Input Capture settings
Let’s look at the MC9S12XEP100 data sheet: Chapter 14
ECT_TCTL3_EDG4B = 1; ECT_TCTL3_EDG4A = 0; //pg 541-542 Or ECT_TCTL3 = 0x02 Or ECT_TCTL3 |= BIT1; ECT_TCTL3 &= ~BIT0;
4. Write the following C code for an input capture on Port T bit 4 (Channel 4 of the Enhanced Captured Timer).
a. Setup the capture so that it captures a falling edge signal.
ECT_TIOS_IOS4 = 0; // input capture. Page 535
ECT_TIE_C4I = 1; //pg 542
Tell the system to use timer channel 4 for an
input capture
Multiple ways to capture a falling
edge signal
Enable channel 4 flag to cause an interrupt
Only if the BITx have been declared properly
Enhanced Capture Timer Input Capture settings
Let’s look at the MC9S12XEP100 data sheet: Chapter 14
In-Class exercise: Interrupts/Timer
ECT_TFLG1 = 0b00010000;
Use one of the following examples:
ECT_TFLG1_C4F = 1; //pg545
or
ECT_TFLG1 = 0x10;
or
ECT_TFLG1 |= BIT4;
4. Write the following C code for an input capture on Port T bit 4 (Channel 4 of the Enhanced Captured Timer).
b. Clear the capture flag for the above problem:
Multiple ways to clear the channel 4
flag
Do not use binary notation
Only if the BITx have been declared properly
Enhanced Capture Timer
Let’s look at the MC9S12XEP100 data sheet: Chapter 14
In-Class exercise: Interrupts/Timer
while(!(TFLG1 & 0x10))
{
; // do nothing but loop while flag bit is low
}
or
!(TFLG1_C4F) or !(TFLG1 & BIT4)
Multiple ways to write the (Boolean expression)Only if the BITx have been declared properly
4. Write the following C code for an input capture on Port T bit 4 (Channel 4 of the Enhanced Captured Timer).