1
Software Defined
Radio
GNU Radio and the
USRP
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Overview
What is Software Defined Radio?
Advantages of Software Defined Radio
Traditional versus SDR Receivers
SDR and the USRP
Using GNU Radio
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Introduction
What is Software Defined Radio (SDR)?
Getting code as close to the antenna as possible
Replacing hardware with software for
modulation/demodulation
Advantages:
Makes communications systems reconfigurable
(adapting to new standards)
Flexible (universal software device - not special
purpose)
Filters/Other Hardware
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4Traditional Receiver
Local Oscillator RF Amplifier IF Amplifier x Demod-ulator fc fLO |fLO-fc| fLO+fc f (KHz) 530 980 1700 10 KHz f (KHz) 530 980 1700 10 KHz 455 f (KHz) 10 KHz fLO=1435 KHz 455 f (KHz) 10 KHz f (KHz) 5 5Traditional vs. SDR Receiver
RF Amplifier IF Amplifier x Demod-ulator Local OscillatorReceiver Front End Traditional
/ Hardware Receiver
Software
Receiver Front End ADC
Current SDR Receiver Software ADC Future SDR Receiver ? 6
SDR Receiver Using the USRP
Receiver
Front End ADC FPGA ControllerUSB PC
Daughterboard Motherboard
similar to traditional front end with fIF = 0
Decimation, MUX, +
Interface to PC GNU Radio software
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7Quadrature Signal
Representation
The received signal, S(t), may be represented as follows:
S(t)= I(t)cos(2! fct)+ Q(t)sin(2! fct)
fc = carrier frequency
I(t) = in-phase component Q(t) = quadrature component
Contain amplitude and phase information of baseband signal •GNU Radio software uses I and Q components to demodulate signals
•USRP front end translates the signal to zero frequency and extracts I and Q
f (MHz) 446 16 KHz
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Extracting I(t) from S
S(t)= I(t)cos(2! fct)+ Q(t)sin(2! fct) S(t)cos(2! fct)= I(t)cos 2(2! f ct)+ Q(t)sin(2! fct)cos(2! fct) =I(t) 2
[
1+ cos(4! fct)]
+ Q(t) 2[
sin(4! fct)+ sin(0)]
=1 2I(t)+ 1 2I(t)cos(4! fct)+ + 1 2Q(t)sin(4! fct)Multiplying both sides by cos(2πfct):
Applying this signal to a low pass filter, the output will be: 1
2I(t)
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Extracting Q(t) from S
S(t)= I(t)cos(2! fct)+ Q(t)sin(2! fct)
S(t)sin(2! fct)= I(t)cos(2! fct)sin(2! fct)+ Q(t)sin
2(2! f ct) =I(t) 2
[
sin(4! fct)" sin(0)]
+ Q(t) 2[
1" cos(4! fct)]
=1 2I(t)sin(4! fct)+ 1 2Q(t)" 1 2Q(t)cos(4! fct)Multiplying both sides by sin(2πfct):
Applying this signal to a low pass filter, the output will be: 1
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10USRP Receiver Front End
RF Amplifier x LPF 90° x LPF LO fc I Q 11
Analog to Digital Converter
(ADC)
12 bit A/D Converter (2
12levels)
2 volt peak-peak maximum input
64 Msamp/second
ADC ∆t !t = 1 64" 106= 0.0156µS !v = 2 212= 0.488mV Quantization Levels: Sampling Interval: 12Decimation
Original sampling rate is 64Msamp/sec
Converts a portion of spectrum 32 MHz wide
Generally we are interested is a narrower portion of the spectrum requiring a lower sampling rate
USB cannot handle that high data rate
Occurs in the FPGA of the USRP
f 32MHz LPF f 250KHz Downsample divide by 128 f 250KHz
fs = 64Msamp/sec fs = 64Msamp/sec fs = 500Ksamp/sec
64M 500K= 128
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13SDR Receiver with USRP
ADC FPGA (Decimator, MUX, etc.) USB Controller PC I Q Daughterboard Motherboard GNU Radio Software 14
USRP
-Motherboard/Daughterboard
15GNU Radio Software
Community-based project started in 1998
GNU Radio application consists of sources (inputs), sinks (outputs) and transform blocks
Transform blocks: math, filtering, modulation/demodulation, coding, etc.
Sources: USRP, audio input, file input, signal generator, …
Sinks: USRP, audio output, file output, FFT, oscilloscope, …
Blocks written in C++
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16Design of a Receiver
USRP: Set frequency of local oscillator (receive
frequency), gain of amplifier, decimation factor
GNU Radio application: use Python to specify
and connect blocks that perform demodulation and decoding
USRP GNU Radio Application
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Example: 400 - 500 MHz NBFM
Receiver
Problem: Receive an audio signal (up to 4
KHz) transmitted at 446 MHz using
narrowband FM (NBFM) with a 16 KHz
transmission bandwidth
USRP GNU Radio Application
f (MHz) 400 446 500 16 KHz a f 4KHz 18
Design Procedure
1.
Plan the block diagram of system
components
2.
Determine block parameters
3.Determine decimation rates
4.
Write Python script to specify the blocks
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19NBFM Receiver: Block
Diagram/Parameters
a f (MHz) 400 446 500 16 KHz Daughterboard fc = 446 MHz f (MHz) 16 KHz ADC 64 Msamp/sec f (MHz) 16 KHz 32 -32 FPGA Dec. factor = ? f (MHz) 16 KHz ? -? Channel Filter cutoff = 8KHz Dec. factor = ? f (KHz) 16 KHz ? -? -88 FM Demodulator Dec. factor = ? f (KHz) 4 -4 Audio FM USRP PC 20Determining the Decimation
Factors
64Msamp/sec 8Ksamp/sec
Total Decimation factor = 8000 = D1D2D3
a f (MHz) 16 KHz 32 -32 FPGA Dec. factor = D1 Channel Filter cutoff = 8KHz Dec. factor = D2 FM Demodulator Dec. factor = D3 -44 f (KHz) Audio 21
FPGA Decimation Factor, D
1•Total Decimation factor = 8000 = D1D2D3
•Maximize the decimation in FPGA •Maximum decimation factor in FPGA = 256 •Select D1 = 250 (factor of 8000)
•Output sample rate = 64Ms/s / 250 = 256Ks/s
f (MHz) 16 KHz 32 -32 FPGA Dec. factor = D1 Channel Filter cutoff = 8KHz Dec. factor = D2 FM Demodulator Dec. factor = D3 -44 f (KHz) Audio
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22Channel Filter Specification
•Maximum frequency = 16 KHz Reduce sample rate to 32 Ks/s •256Ks/s / 32Ks/s D2 = 8 a f (MHz) 16 KHz 32 -32 FPGA Dec. factor = 250 Channel Filter cutoff = 8KHz Dec. factor = D2 FM Demodulator Dec. factor = D3 -44 f (KHz) Audio f (KHz) 16 KHz 128 -128 64Ms/s 256Ks/s a H (dB) f (KHz) -60 -16 -9-8 89 16 -0.1 0 Channel Filter 23
FM Demodulator
•Maximum frequency = 4 KHz Reduce sample rate to 8 Ks/s •32Ks/s / 8Ks/s D3 = 4
•FM Demodulator block “extracts” audio signal from FM waveform by operating on I and Q a f (MHz) 16 KHz 32 -32 FPGA Dec. factor = 250 Channel Filter cutoff = 8KHz Dec. factor = 8 FM Demodulator Dec. factor = D3 -44f (KHz) Audio f (KHz) 16 KHz 128 -128 64Ms/s 256Ks/s f (KHz) 16 KHz -16-88 FM 16 32Ks/s 24
Complete Application Design
•Total decimation ratio = 250*8*4 = 8000
•Problem: The audio card requires an input sample rate ≥ 44.1 Ks/s •Solution: Use a Resampler to increase the output sample rate
f (MHz) 16 KHz 32 -32 FPGA Dec. factor = 250 Channel Filter cutoff = 8KHz Dec. factor = 8 FM Demodulator Dec. factor = 4 f (KHz) 4 -4 Audio f (KHz) 16 KHz 128 -128 64Ms/s 256Ks/s f (KHz) 16 KHz -16-88 FM 16 32Ks/s 8Ks/s
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25Final Application Design
•Audio Card requires a sample rate ≥ 44.1 Ks/sec. Use 48 Ks/sec. •Modify FM Demodulator to have a decimation factor of 1 (no change) •Increase the sample rate to 48 Ks/sec with Resampler (x 3/2)
a FPGA Dec. factor = 250 Channel Filter cutoff = 8KHz Dec. factor = 8 FM Demodulator Dec. factor = 1 48Ks/s Resampler mult by 3 div by 2 32Ks/s 32Ks/s 256Ks/s 64Ms/s 26
Implementing the Design
Create a Python script to specify and
connect the various GNU radio blocks
Blocks are already written in C++
USRP parameters are set within Python
script
# indicates that the line is a comment
Refer to nbfm.py script
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Setting the USRP Parameters
The following code sets the USRP
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28Channel Filter Design
The following code specifies the channel
filter and computes the coefficients
a H (dB) f (KHz) -60 -16 -9-8 89 16 -0.1 0 29
Channel Filter Creation
The following code creates the channel filter
using the coefficients computed:
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FM Demodulator
The following code creates the FM demodulator.
The demodulator block also includes a low pass
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31Resampler
The following code creates the resampler.
The resampler decimates and/or interpolates the
data to adjust the sample rate.
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Connecting the Blocks
The following code connects the blocks:
Or, a single connect statement:
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Final Thoughts